公开(公告)号：US11903221B2

公开(公告)日：2024-02-13

申请号：US17156320

申请日：2021-01-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chenchen Wang ,  Chun-Chieh Lu ,  Chi On Chui ,  Yu-Ming Lin ,  Sai-Hooi Yeong

IPC: H10B63/00 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H10B61/00

CPC classification number: H10B63/84 ,  H01L29/42392 ,  H01L29/66666 ,  H01L29/78642 ,  H10B61/22 ,  H10B63/34

Abstract: A device includes a first transistor over a substrate, a second transistor disposed over the first transistor, and a memory element disposed over the second transistor. The second transistor includes a channel layer, a gate dielectric layer surrounding a sidewall of the channel layer, and a gate electrode surrounding a sidewall of the gate dielectric layer.

公开(公告)号：US12243573B2

公开(公告)日：2025-03-04

申请号：US18343972

申请日：2023-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chenchen Wang ,  Sai-Hooi Yeong ,  Chi On Chui ,  Yu-Ming Lin

IPC: H01L29/78 ,  G11C11/22 ,  H01L29/51

Abstract: A semiconductor device including a capacitor, with a memory film isolating a first electrode from a contact, formed over a transistor and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate stack over a semiconductor substrate; a capacitor over the gate stack, the capacitor including a first electrode extending along a top surface of the gate stack, the first electrode being U-shaped; a first ferroelectric layer over the first electrode; and a second electrode over the first ferroelectric layer, a top surface of the second electrode being level with a top surface of the first ferroelectric layer, and the top surface of the first ferroelectric layer and the top surface of the second electrode being disposed further from the semiconductor substrate than a topmost surface of the first electrode.

公开(公告)号：US20230368830A1

公开(公告)日：2023-11-16

申请号：US18343972

申请日：2023-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chenchen Wang ,  Sai-Hooi Yeong ,  Chi On Chui ,  Yu-Ming Lin

IPC: G11C11/22 ,  H01L29/78 ,  H01L29/51

CPC classification number: G11C11/221 ,  H01L29/78391 ,  H01L29/516

Abstract: A semiconductor device including a capacitor, with a memory film isolating a first electrode from a contact, formed over a transistor and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate stack over a semiconductor substrate; a capacitor over the gate stack, the capacitor including a first electrode extending along a top surface of the gate stack, the first electrode being U-shaped; a first ferroelectric layer over the first electrode; and a second electrode over the first ferroelectric layer, a top surface of the second electrode being level with a top surface of the first ferroelectric layer, and the top surface of the first ferroelectric layer and the top surface of the second electrode being disposed further from the semiconductor substrate than a topmost surface of the first electrode.

公开(公告)号：US20230397442A1

公开(公告)日：2023-12-07

申请号：US18447805

申请日：2023-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chenchen Wang ,  Chun-Chieh Lu ,  Chi On Chui ,  Yu-Ming Lin ,  Sai-Hooi Yeong

IPC: H10B63/00 ,  H01L29/66 ,  H01L29/786 ,  H01L29/423 ,  H10B61/00

CPC classification number: H10B63/84 ,  H01L29/66666 ,  H01L29/78642 ,  H01L29/42392 ,  H10B61/22 ,  H10B63/34

Abstract: A device includes a first transistor over a substrate, a second transistor disposed over the first transistor, and a memory element disposed over the second transistor. The second transistor includes a channel layer, a gate dielectric layer surrounding a sidewall of the channel layer, and a gate electrode surrounding a sidewall of the gate dielectric layer.

公开(公告)号：US11727976B2

公开(公告)日：2023-08-15

申请号：US17814755

申请日：2022-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chenchen Wang ,  Sai-Hooi Yeong ,  Chi On Chui ,  Yu-Ming Lin

IPC: H01L29/78 ,  H01L29/51 ,  G11C11/22

CPC classification number: G11C11/221 ,  H01L29/516 ,  H01L29/78391

Abstract: A semiconductor device including a capacitor, with a memory film isolating a first electrode from a contact, formed over a transistor and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate stack over a semiconductor substrate; a capacitor over the gate stack, the capacitor including a first electrode extending along a top surface of the gate stack, the first electrode being U-shaped; a first ferroelectric layer over the first electrode; and a second electrode over the first ferroelectric layer, a top surface of the second electrode being level with a top surface of the first ferroelectric layer, and the top surface of the first ferroelectric layer and the top surface of the second electrode being disposed further from the semiconductor substrate than a topmost surface of the first electrode.

公开(公告)号：US20220358983A1

公开(公告)日：2022-11-10

申请号：US17814755

申请日：2022-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chenchen Wang ,  Sai-Hooi Yeong ,  Chi On Chui ,  Yu-Ming Lin

IPC: G11C11/22 ,  H01L29/78 ,  H01L29/51

Abstract: A semiconductor device including a capacitor, with a memory film isolating a first electrode from a contact, formed over a transistor and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate stack over a semiconductor substrate; a capacitor over the gate stack, the capacitor including a first electrode extending along a top surface of the gate stack, the first electrode being U-shaped; a first ferroelectric layer over the first electrode; and a second electrode over the first ferroelectric layer, a top surface of the second electrode being level with a top surface of the first ferroelectric layer, and the top surface of the first ferroelectric layer and the top surface of the second electrode being disposed further from the semiconductor substrate than a topmost surface of the first electrode.