公开(公告)号：US20210036147A1

公开(公告)日：2021-02-04

申请号：US16888846

申请日：2020-05-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Wang ,  Sheng-Wei Yeh ,  Yueh-Ching Pai ,  Chi-Jen Yang

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/66 ,  H01L21/768

Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.

公开(公告)号：US12170202B2

公开(公告)日：2024-12-17

申请号：US18149129

申请日：2023-01-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Yu Lin ,  Chi-Yu Chou ,  Hsien-Ming Lee ,  Huai-Tei Yang ,  Chun-Chieh Wang ,  Yueh-Ching Pai ,  Chi-Jen Yang ,  Tsung-Ta Tang ,  Yi-Ting Wang

IPC: H01L23/00 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3213 ,  H01L29/49

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

公开(公告)号：US20230141521A1

公开(公告)日：2023-05-11

申请号：US18149129

申请日：2023-01-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Yu LIN ,  Chi-Yu Chou ,  Hsien-Ming Lee ,  Huai-Tei Yang ,  Chun-Chieh Wang ,  Yueh-Ching Pai ,  Chi-Jen Yang ,  Tsung-Ta Tang ,  Yi-Ting Wang

IPC: H01L21/28 ,  H01L29/49 ,  H01L21/3213 ,  H01L21/285

CPC classification number: H01L21/28088 ,  H01L29/4966 ,  H01L21/32135 ,  H01L21/28556

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

公开(公告)号：US11411112B2

公开(公告)日：2022-08-09

申请号：US16888846

申请日：2020-05-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Chieh Wang ,  Sheng-Wei Yeh ,  Yueh-Ching Pai ,  Chi-Jen Yang

IPC: H01L29/78 ,  H01L21/768 ,  H01L29/66 ,  H01L29/16 ,  H01L29/49 ,  H01L27/088 ,  H01L23/532

Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.

公开(公告)号：US10535523B1

公开(公告)日：2020-01-14

申请号：US16117234

申请日：2018-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Yu Lin ,  Chi-Yu Chou ,  Hsien-Ming Lee ,  Huai-Tei Yang ,  Chun-Chieh Wang ,  Yueh-Ching Pai ,  Chi-Jen Yang ,  Tsung-Ta Tang ,  Yi-Ting Wang

IPC: H01L21/28 ,  H01L29/49 ,  H01L21/3213 ,  H01L21/285

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

公开(公告)号：US11545363B2

公开(公告)日：2023-01-03

申请号：US17128408

申请日：2020-12-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Yu Lin ,  Chi-Yu Chou ,  Hsien-Ming Lee ,  Huai-Tei Yang ,  Chun-Chieh Wang ,  Yueh-Ching Pai ,  Chi-Jen Yang ,  Tsung-Ta Tang ,  Yi-Ting Wang

IPC: H01L21/28 ,  H01L29/49 ,  H01L21/3213 ,  H01L21/285

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.