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    Semiconductor package
    1.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11508666B2

    公开(公告)日：2022-11-22

    申请号：US16914480

    申请日：2020-06-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Sen-Kuei Hsu ,  Hsin-Yu Pan ,  Chien-Chang Lin

    IPC: H01L29/00 ,  H01L23/538 ,  H03H7/01 ,  H01L23/66 ,  H01P3/08

    Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor die, a stack of polymer layers, redistribution elements and a passive filter. The polymer layers cover a front surface of the semiconductor die. The redistribution elements and the passive filter are disposed in the stack of polymer layers. The passive filter includes a ground plane and conductive patches. The ground plane is overlapped with the conductive patches, and the conductive patches are laterally separated from one another. The ground plane is electrically coupled to a reference voltage. The conductive patches are electrically connected to the ground plane, electrically floated, or electrically coupled to a direct current (DC) voltage.

    SEMICONDUCTOR PACKAGE
    2.
    发明申请
    SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20210407914A1

    公开(公告)日：2021-12-30

    申请号：US16914480

    申请日：2020-06-29

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Sen-Kuei Hsu ,  Hsin-Yu Pan ,  Chien-Chang Lin

    IPC: H01L23/538 ,  H03H7/01 ,  H01L23/66 ,  H01P3/08

    Abstract: A semiconductor package is provided. The semiconductor package includes a semiconductor die, a stack of polymer layers, redistribution elements and a passive filter. The polymer layers cover a front surface of the semiconductor die. The redistribution elements and the passive filter are disposed in the stack of polymer layers. The passive filter includes a ground plane and conductive patches. The ground plane is overlapped with the conductive patches, and the conductive patches are laterally separated from one another. The ground plane is electrically coupled to a reference voltage. The conductive patches are electrically connected to the ground plane, electrically floated, or electrically coupled to a direct current (DC) voltage.

    Memory module, semiconductor package including the same, and manufacturing method thereof
    3.
    发明授权
    Memory module, semiconductor package including the same, and manufacturing method thereof 有权

    公开(公告)号：US11018113B2

    公开(公告)日：2021-05-25

    申请号：US16655237

    申请日：2019-10-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Lipu Kris Chuang ,  Chung-Hao Tsai ,  Hsin-Yu Pan ,  Yi-Che Chiang ,  Chien-Chang Lin

    IPC: H01L25/065 ,  H01L23/31 ,  H01L23/373 ,  H01L21/48 ,  H01L25/00 ,  H01L21/56 ,  H01L23/367

    Abstract: A memory module includes a first redistribution structure, a second redistribution structure, first semiconductor dies, second semiconductor dies, an encapsulant, through insulator vias and thermally conductive material. Second redistribution structure is stacked over first redistribution structure. First semiconductor dies are sandwiched between first redistribution structure and second redistribution structure and disposed side by side. Second semiconductor dies are disposed on the second redistribution structure. The encapsulant laterally wraps the second semiconductor dies. The through insulator vias are disposed among the first semiconductor dies, extending from the first redistribution structure to the second redistribution structure. The through insulator vias are electrically connected to the first redistribution structure and the second redistribution structure. The thermally conductive material is disposed on the second redistribution structure, among the second semiconductor dies and overlying the through insulator vias. The thermally conductive material has a thermal conductivity larger than that of the encapsulant.

    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
    4.
    发明申请
    SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20210296221A1

    公开(公告)日：2021-09-23

    申请号：US16827595

    申请日：2020-03-23

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Ching-Feng Yang ,  Hsin-Yu Pan ,  Kai-Chiang Wu ,  Chien-Chang Lin

    IPC: H01L23/498 ,  H01L21/48 ,  H01L21/52 ,  H01L23/16

    Abstract: A semiconductor package includes a circuit board structure, a redistribution layer structure, a package structure, and a ring structure. The redistribution layer structure has a first region and a second region surrounding the first region. The redistribution layer structure is disposed over and electrically connected to the circuit board structure. A metal density in the second region is greater than a metal density in the first region. The package structure is disposed over the first region of the redistribution layer structure. The package structure is electrically connected to the redistribution layer structure. The ring structure is disposed over the second region of the redistribution layer structure.

    MEMORY MODULE, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF
    5.
    发明申请
    MEMORY MODULE, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20210118847A1

    公开(公告)日：2021-04-22

    申请号：US16655237

    申请日：2019-10-17

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Lipu Kris Chuang ,  Chung-Hao Tsai ,  Hsin-Yu Pan ,  Yi-Che Chiang ,  Chien-Chang Lin

    IPC: H01L25/065 ,  H01L23/31 ,  H01L23/373 ,  H01L23/367 ,  H01L25/00 ,  H01L21/56 ,  H01L21/48

    Abstract: A memory module includes a first redistribution structure, a second redistribution structure, first semiconductor dies, second semiconductor dies, an encapsulant, through insulator vias and thermally conductive material. Second redistribution structure is stacked over first redistribution structure. First semiconductor dies are sandwiched between first redistribution structure and second redistribution structure and disposed side by side. Second semiconductor dies are disposed on the second redistribution structure. The encapsulant laterally wraps the second semiconductor dies. The through insulator vias are disposed among the first semiconductor dies, extending from the first redistribution structure to the second redistribution structure. The through insulator vias are electrically connected to the first redistribution structure and the second redistribution structure. The thermally conductive material is disposed on the second redistribution structure, among the second semiconductor dies and overlying the through insulator vias. The thermally conductive material has a thermal conductivity larger than that of the encapsulant.

    Semiconductor package and manufacturing method thereof
    8.
    发明授权
    Semiconductor package and manufacturing method thereof 有权

    公开(公告)号：US11574857B2

    公开(公告)日：2023-02-07

    申请号：US16827595

    申请日：2020-03-23

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Ching-Feng Yang ,  Hsin-Yu Pan ,  Kai-Chiang Wu ,  Chien-Chang Lin

    IPC: H01L23/498 ,  H01L21/52 ,  H01L23/16 ,  H01L21/48 ,  H01L25/18

    Abstract: A semiconductor package includes a circuit board structure, a redistribution layer structure, a package structure, and a ring structure. The redistribution layer structure has a first region and a second region surrounding the first region. The redistribution layer structure is disposed over and electrically connected to the circuit board structure. A metal density in the second region is greater than a metal density in the first region. The package structure is disposed over the first region of the redistribution layer structure. The package structure is electrically connected to the redistribution layer structure. The ring structure is disposed over the second region of the redistribution layer structure.

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