公开(公告)号：US20150228763A1

公开(公告)日：2015-08-13

申请号：US14176873

申请日：2014-02-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Chih LIN ,  Long-Jie HONG ,  Chih-Lin WANG ,  Chia-Der CHANG

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/311 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/31055 ,  H01L21/311 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.

Abstract translation: 一种用于制造半导体器件的方法包括在衬底中形成两个隔离结构以在衬底中的两个隔离结构之间限定翅片结构。 形成虚拟栅极和间隔物，桥接两个隔离结构和鳍状结构。 用虚拟栅极和间隔物作为掩模蚀刻两个隔离结构，以在两个隔离结构中的间隔物下方形成多个斜面。 在多个斜面上形成栅极蚀刻停止层。 去除虚拟栅极和虚拟栅极之下的两个隔离结构以产生由间隔物和栅极蚀刻停止层限制的空腔。 然后在空腔中形成栅极。

公开(公告)号：US20190067283A1

公开(公告)日：2019-02-28

申请号：US15688478

申请日：2017-08-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yin WANG ,  Chien-Chih LIN ,  Chien-Tai CHAN ,  Wei-Ken LIN ,  Chun-Te LI

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/417 ,  H01L21/324

Abstract: A fin field-effect transistor (FinFET) structure and a method for forming the same are provided. The FinFET structure includes a first fin structure that protrudes from a first region of a substrate. A second fin structure protrudes from a second region of the substrate. Isolation regions cover lower portions of the first fin structure and the second fin structure and leave upper portions of the first fin structure and the second fin structure above the isolation regions. A first liner layer is positioned between the lower portion of the first fin structure and the isolation regions in the first region. A second liner layer covers the lower portion of the second fin structure and is positioned between the second fin structure and the isolation regions in the second region. The first liner layer and the second liner layer are formed of different materials.

公开(公告)号：US20150340475A1

公开(公告)日：2015-11-26

申请号：US14819654

申请日：2015-08-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chien-Chih LIN ,  Long-Jie HONG ,  Chih-Lin WANG ,  Chia-Der CHANG

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/3105 ,  H01L21/311

CPC classification number: H01L29/66795 ,  H01L21/31055 ,  H01L21/311 ,  H01L21/31144 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: A method for manufacturing a semiconductor device includes forming two isolation structures in a substrate to define a fin structure between the two isolation structures in the substrate. A dummy gate and spacers are formed bridging the two isolation structures and over the fin structure. The two isolation structures are etched with the dummy gate and the spacers as a mask to form a plurality of slopes under the spacers in the two isolation structures. A gate etch stop layer is formed overlying the plurality of slopes. The dummy gate and the two isolation structures beneath the dummy gate are removed to create a cavity confined by the spacers and the gate etch stop layer. A gate is then formed in the cavity.

Abstract translation: 一种用于制造半导体器件的方法包括在衬底中形成两个隔离结构以在衬底中的两个隔离结构之间限定翅片结构。 形成虚拟栅极和间隔物，桥接两个隔离结构和鳍状结构。 用虚拟栅极和间隔物作为掩模蚀刻两个隔离结构，以在两个隔离结构中的间隔物下方形成多个斜面。 在多个斜面上形成栅极蚀刻停止层。 去除虚拟栅极和虚拟栅极之下的两个隔离结构以产生由间隔物和栅极蚀刻停止层限制的空腔。 然后在空腔中形成栅极。