公开(公告)号：US10276565B2

公开(公告)日：2019-04-30

申请号：US15629904

申请日：2017-06-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Pin Huang ,  Hou-Yu Chen ,  Chuan-Li Chen ,  Chih-Kuan Yu ,  Yao-Ling Huang

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265

Abstract: A semiconductor device includes a substrate; a first device disposed on the substrate, and the first device includes at least two first gate stacks, in which the two adjacent first gate stacks have a first distance therebetween; a plurality of first gate spacers having a first thickness disposed on opposite sidewalls of the first gate stacks; the semiconductor device further includes a second device disposed on the substrate, and the second device includes at least two second gate stacks, in which the two adjacent second gate stacks have a second distance therebetween, and the first distance is smaller than the second distance; a plurality of second gate spacers having a second thickness disposed on opposite sidewalls of the second gate stacks, and the first thickness is greater than the second thickness.

公开(公告)号：US20210210532A1

公开(公告)日：2021-07-08

申请号：US16733433

申请日：2020-01-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Chi Hung ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wei Chuang Wu ,  Yen-Yu Chen ,  Chih-Kuan Yu

IPC: H01L27/146

Abstract: Some embodiments are directed towards an image sensor device. A photodetector is disposed in a semiconductor substrate, and a transfer transistor is disposed over photodetector. The transfer transistor includes a transfer gate having a lateral portion extending over a frontside of the semiconductor substrate and a vertical portion extending to a first depth below the frontside of the semiconductor substrate. A gate dielectric separates the lateral portion and the vertical portion from the semiconductor substrate. A backside trench isolation structure extends from a backside of the semiconductor substrate to a second depth below the frontside of the semiconductor substrate. The backside trench isolation structure laterally surrounds the photodetector, and the second depth is less than the first depth such that a lowermost portion of the vertical portion of the transfer transistor has a vertical overlap with an uppermost portion of the backside trench isolation structure.

公开(公告)号：US11462534B2

公开(公告)日：2022-10-04

申请号：US17105963

申请日：2020-11-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Pin Huang ,  Hou-Yu Chen ,  Chuan-Li Chen ,  Chih-Kuan Yu ,  Yao-Ling Huang

IPC: H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L21/8234

Abstract: A device comprises a first transistor disposed within a first device region of a substrate and a second transistor disposed within a second device region of the substrate. The first transistor comprises first source/drain regions, a first gate structure laterally between the first source/drain regions, and first gate spacers respectively on opposite sidewalls of the first gate structure. The second transistor comprises second source/drain regions, a second gate structure laterally between the second source/drain regions, and second gate spacers respectively on opposite sidewalls of the second gate structure. The second source/drain regions of the second transistor have a maximal width greater than a maximal width of the first source/drain regions of the first transistor, but the second gate spacers of the second transistor have a thickness less than a thickness of the first gate spacers.

公开(公告)号：US11437420B2

公开(公告)日：2022-09-06

申请号：US16733433

申请日：2020-01-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Feng-Chi Hung ,  Dun-Nian Yaung ,  Jen-Cheng Liu ,  Wei Chuang Wu ,  Yen-Yu Chen ,  Chih-Kuan Yu

IPC: H01L27/146

Abstract: Some embodiments are directed towards an image sensor device. A photodetector is disposed in a semiconductor substrate, and a transfer transistor is disposed over photodetector. The transfer transistor includes a transfer gate having a lateral portion extending over a frontside of the semiconductor substrate and a vertical portion extending to a first depth below the frontside of the semiconductor substrate. A gate dielectric separates the lateral portion and the vertical portion from the semiconductor substrate. A backside trench isolation structure extends from a backside of the semiconductor substrate to a second depth below the frontside of the semiconductor substrate. The backside trench isolation structure laterally surrounds the photodetector, and the second depth is less than the first depth such that a lowermost portion of the vertical portion of the transfer transistor has a vertical overlap with an uppermost portion of the backside trench isolation structure.

公开(公告)号：US11923358B2

公开(公告)日：2024-03-05

申请号：US17876082

申请日：2022-07-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Pin Huang ,  Hou-Yu Chen ,  Chuan-Li Chen ,  Chih-Kuan Yu ,  Yao-Ling Huang

IPC: H01L27/088 ,  H01L21/265 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/088 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823468 ,  H01L27/0886 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785 ,  H01L21/26506

Abstract: A device comprises a first transistor, a second transistor, a first contact, and a second contact. The first transistor comprises a first gate structure, first source/drain regions on opposite sides of the first gate structure, and first gate spacers spacing the first gate structure apart from the first source/drain regions. The second transistor comprises a second gate structure, second source/drain regions on opposite sides of the second gate structure, and second gate spacers spacing the second gate structure apart from the second source/drain regions. The first contact forms a first contact interface with one of the first source/drain regions. The second contact forms a second contact interface with one of the second source/drain regions. An area ratio of the first contact interface to top surface the first source/drain region is greater than an area ratio of the second contact interface to top surface of the second source/drain region.

公开(公告)号：US10854599B2

公开(公告)日：2020-12-01

申请号：US16396931

申请日：2019-04-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chung-Pin Huang ,  Hou-Yu Chen ,  Chuan-Li Chen ,  Chih-Kuan Yu ,  Yao-Ling Huang

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265

Abstract: A method includes forming a first gate, a second gate, a third gate, and a fourth gate over a substrate, in which a first distance between the first gate and the second gate is less than a second distance between the third gate and the fourth gate. A first spacer over a sidewall of the first gate, a second spacer over a sidewall of the second gate, a third spacer over a sidewall of the third gate, and a fourth spacer over a sidewall of the fourth gate are formed. A mask layer over the first and second spacers is formed, in which the third and fourth spacers are exposed from the mask layer. The exposed third and fourth spacers are trimmed.