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公开(公告)号:US20210265346A1
公开(公告)日:2021-08-26
申请号:US16798685
申请日:2020-02-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jing-Yi Lin , Chih-Chuan Yang , Shih-Hao Lin
IPC: H01L27/092 , H01L21/8238 , H01L27/02
Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.
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公开(公告)号:US20220285369A1
公开(公告)日:2022-09-08
申请号:US17750649
申请日:2022-05-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Hao Lin , Kian-Long Lim , Chih-Chuan Yang , Chia-Hao Pao , Jing-Yi Lin
IPC: H01L27/11 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L29/66 , H01L21/3065 , H01L21/308 , H01L21/8238
Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
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公开(公告)号:US11937416B2
公开(公告)日:2024-03-19
申请号:US17750649
申请日:2022-05-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Hao Lin , Kian-Long Lim , Chih-Chuan Yang , Chia-Hao Pao , Jing-Yi Lin
IPC: H01L27/11 , H01L21/02 , H01L21/3065 , H01L21/308 , H01L21/8238 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/786 , H10B10/00
CPC classification number: H10B10/125 , H01L21/02532 , H01L21/02603 , H01L21/3065 , H01L21/308 , H01L21/823807 , H01L21/823814 , H01L29/0673 , H01L29/42392 , H01L29/66545 , H01L29/66636 , H01L29/66742 , H01L29/78618 , H01L29/78696
Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
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公开(公告)号:US11342338B2
公开(公告)日:2022-05-24
申请号:US17009034
申请日:2020-09-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Hao Lin , Kian-Long Lim , Chih-Chuan Yang , Chia-Hao Pao , Jing-Yi Lin
IPC: H01L27/11 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/3065 , H01L21/308 , H01L21/8238 , H01L29/66
Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
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公开(公告)号:US20210098473A1
公开(公告)日:2021-04-01
申请号:US17009034
申请日:2020-09-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Hao Lin , Kian-Long Lim , Chih-Chuan Yang , Chia-Hao Pao , Jing-Yi Lin
IPC: H01L27/11 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/3065 , H01L21/308 , H01L21/8238 , H01L29/66
Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
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公开(公告)号:US20240260249A1
公开(公告)日:2024-08-01
申请号:US18608199
申请日:2024-03-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Hao Lin , Kian-Long Lim , Chih-Chuan Yang , Chia-Hao Pao , Jing-Yi Lin
IPC: H10B10/00 , H01L21/02 , H01L21/3065 , H01L21/308 , H01L21/8238 , H01L29/06 , H01L29/423 , H01L29/66 , H01L29/786
CPC classification number: H10B10/125 , H01L21/02532 , H01L21/02603 , H01L21/3065 , H01L21/308 , H01L21/823807 , H01L21/823814 , H01L29/0673 , H01L29/42392 , H01L29/66545 , H01L29/66636 , H01L29/66742 , H01L29/78618 , H01L29/78696
Abstract: A substrate includes a first doped region having a first type dopant, and a second doped region having a second type dopant and adjacent to the first doped region. A stack is formed that includes first layers and second layers alternating with each other. The first and second layers each have a first and second semiconductor material, respectively. The second semiconductor material is different than the first semiconductor material. A mask element is formed that has an opening in a channel region over the second doped region. A top portion of the stack not covered by the mask element is recessed. The stack is then processed to form a first and a second transistors. The first transistor has a first number of first layers. The second transistor has a second number of first layers. The first number is greater than the second number.
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公开(公告)号:US11430788B2
公开(公告)日:2022-08-30
申请号:US16798685
申请日:2020-02-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jing-Yi Lin , Chih-Chuan Yang , Shih-Hao Lin
IPC: H01L27/092 , H01L27/02 , H01L21/8238
Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method includes forming an epitaxial structure having a first doping type over a first portion of a semiconductor substrate. A second portion of the semiconductor substrate is formed over the epitaxial structure and the first portion of the semiconductor substrate. A first doped region having the first doping type is formed in the second portion of the semiconductor substrate and directly over the epitaxial structure. A second doped region having a second doping type opposite the first doping type is formed in the second portion of the semiconductor substrate, where the second doped region is formed on a side of the epitaxial structure. A plurality of fins of the semiconductor substrate are formed by selectively removing portions of the second portion of the semiconductor substrate.
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