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公开(公告)号：US20240321613A1
公开(公告)日：2024-09-26
申请号：US18679252
申请日：2024-05-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
CPC classification number: H01L21/67288 , H01L22/14
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
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公开(公告)号：US10102615B2
公开(公告)日：2018-10-16
申请号：US15378482
申请日：2016-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Wen-Hao Cheng , Peng-Ren Chen , Chih-Chiang Tu
Abstract: Methods and system for detecting hotspots in semiconductor wafer are provided. At least one semiconductor wafer is inspected to detect a plurality of hotspots of each die in the semiconductor wafer, wherein each of the hotspots has defect coordinates in a layout of the die. The hotspots of the dies are stacked in the layout according to the defect coordinates of the hotspots. A common pattern is obtained according to the stacked hotspots corresponding to a location with specific coordinates in the layout. It is determined whether the common pattern is a known pattern having an individual identification (ID) code. A new ID code is assigned to the common pattern when the common pattern is an unknown pattern.
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公开(公告)号：US11600505B2
公开(公告)日：2023-03-07
申请号：US16527435
申请日：2019-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
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Patent Agency Ranking
公开(公告)号：US20230178399A1
公开(公告)日：2023-06-08
申请号：US18163821
申请日：2023-02-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
CPC classification number: H01L21/67288 , H01L22/14
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
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公开(公告)号：US11094057B2
公开(公告)日：2021-08-17
申请号：US16984090
申请日：2020-08-03
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Inventor： Peng-Ren Chen , Shiang-Bau Wang , Wen-Hao Cheng , Yung-Jung Chang , Wei-Chung Hu , Yi-An Huang , Jyun-Hong Chen
Abstract: A method includes capturing a raw image from a semiconductor wafer, using graphic data system (GDS) information corresponding to the wafer to assign a measurement box in the raw image, performing a distance measurement on a feature of the raw image in the measurement box, and performing a manufacturing activity based on the distance measurement.
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公开(公告)号：US10762621B2
公开(公告)日：2020-09-01
申请号：US16400833
申请日：2019-05-01
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
Inventor： Peng-Ren Chen , Shiang-Bau Wang , Wen-Hao Cheng , Yung-Jung Chang , Wei-Chung Hu , Yi-An Huang , Jyun-Hong Chen
Abstract: A method includes capturing a raw image from a semiconductor wafer, assigning a measurement box in the raw image, arranging a pair of indicators in the measurement box according to graphic data system (GDS) information of the semiconductor wafer, measuring a distance between the indicators, and performing a manufacturing activity based on the measured distance.
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公开(公告)号：US10304178B2
公开(公告)日：2019-05-28
申请号：US14858049
申请日：2015-09-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventor： Peng-Ren Chen , Shiang-Bau Wang , Wen-Hao Cheng , Yung-Jung Chang , Wei-Chung Hu , Yi-An Huang , Jyun-Hong Chen
Abstract: Methods and systems for diagnosing semiconductor wafer are provided. A target image is obtained according to graphic data system (GDS) information of a specific layout in the semiconductor wafer, wherein the target image includes a first contour having a first pattern corresponding to the specific layout. Image-based alignment is performed to capture a raw image from the semiconductor wafer according to the first contour. The semiconductor wafer is analyzed by measuring the raw image, so as to provide a diagnostic result.
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公开(公告)号：US12027396B2
公开(公告)日：2024-07-02
申请号：US18163821
申请日：2023-02-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Peng-Ren Chen , Wen-Hao Cheng , Jyun-Hong Chen , Chien-Hui Chen
CPC classification number: H01L21/67288 , H01L22/14
Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.
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