公开(公告)号：US11094057B2

公开(公告)日：2021-08-17

申请号：US16984090

申请日：2020-08-03

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD

发明人： Peng-Ren Chen ,  Shiang-Bau Wang ,  Wen-Hao Cheng ,  Yung-Jung Chang ,  Wei-Chung Hu ,  Yi-An Huang ,  Jyun-Hong Chen

IPC分类号： G06T7/00 ,  G06K9/62

摘要： A method includes capturing a raw image from a semiconductor wafer, using graphic data system (GDS) information corresponding to the wafer to assign a measurement box in the raw image, performing a distance measurement on a feature of the raw image in the measurement box, and performing a manufacturing activity based on the distance measurement.

公开(公告)号：US20210074859A1

公开(公告)日：2021-03-11

申请号：US17099456

申请日：2020-11-16

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhe-Hao Zhang ,  Tung-Wen Cheng ,  Che-Cheng Chang ,  Yung-Jung Chang ,  Chang-Yin Chen

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L21/306 ,  H01L29/165 ,  H01L21/8234 ,  H01L29/08 ,  H01L27/088 ,  H01L21/311

摘要： A fin field effect transistor (FinFET) device structure and method for forming FinFET device structure are provided. The FinFET structure includes a substrate and an isolation structure formed on the substrate. The FinFET structure also includes a fin structure extending above the substrate, and the fin structure is embedded in the isolation structure. The FinFET structure further includes an epitaxial structure formed on the fin structure, the epitaxial structure has a pentagon-like shape, and an interface between the epitaxial structure and the fin structure is lower than a top surface of the isolation structure.

公开(公告)号：US10762621B2

公开(公告)日：2020-09-01

申请号：US16400833

申请日：2019-05-01

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD

发明人： Peng-Ren Chen ,  Shiang-Bau Wang ,  Wen-Hao Cheng ,  Yung-Jung Chang ,  Wei-Chung Hu ,  Yi-An Huang ,  Jyun-Hong Chen

IPC分类号： G06T7/00 ,  G06K9/62

摘要： A method includes capturing a raw image from a semiconductor wafer, assigning a measurement box in the raw image, arranging a pair of indicators in the measurement box according to graphic data system (GDS) information of the semiconductor wafer, measuring a distance between the indicators, and performing a manufacturing activity based on the measured distance.

公开(公告)号：US10304178B2

公开(公告)日：2019-05-28

申请号：US14858049

申请日：2015-09-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Peng-Ren Chen ,  Shiang-Bau Wang ,  Wen-Hao Cheng ,  Yung-Jung Chang ,  Wei-Chung Hu ,  Yi-An Huang ,  Jyun-Hong Chen

IPC分类号： G06K9/62 ,  G06T7/00

摘要： Methods and systems for diagnosing semiconductor wafer are provided. A target image is obtained according to graphic data system (GDS) information of a specific layout in the semiconductor wafer, wherein the target image includes a first contour having a first pattern corresponding to the specific layout. Image-based alignment is performed to capture a raw image from the semiconductor wafer according to the first contour. The semiconductor wafer is analyzed by measuring the raw image, so as to provide a diagnostic result.

公开(公告)号：US20220328356A1

公开(公告)日：2022-10-13

申请号：US17808709

申请日：2022-06-24

申请人： Taiwan Semiconductor Manufacturing Co, Ltd.

发明人： Che-Cheng Chang ,  Chang-Yin Chen ,  Jr-Jung Lin ,  Chih-Han Lin ,  Yung-Jung Chang

IPC分类号： H01L21/8234 ,  H01L27/12 ,  H01L21/84 ,  H01L27/088 ,  H01L21/3213 ,  H01L29/78

摘要： Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a substrate. The semiconductor device also includes a first fin and a second fin over the substrate. The semiconductor device further includes a first gate electrode and a second gate electrode traversing over the first fin and the second fin, respectively. In addition, the semiconductor device includes a gate dielectric layer between the first fin and the first gate electrode and between the second fin and the second gate electrode. Further, the semiconductor device includes a dummy gate electrode over the substrate, and the dummy gate electrode is between the first gate electrode and the second gate electrode. An upper portion of the dummy gate electrode is wider than a lower portion of the dummy gate electrode.

公开(公告)号：US10128355B2

公开(公告)日：2018-11-13

申请号：US15388302

申请日：2016-12-22

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Che-Cheng Chang ,  Yung-Jung Chang

IPC分类号： H01L27/088 ,  H01L27/12 ,  H01L29/66 ,  H01L21/308 ,  H01L21/306 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06

摘要： Methods for forming a fin field effect transistor (FinFET) device structure are provided. The method includes providing a first fin structure and a second fin structure extending above a substrate and forming an isolation structure over the substrate, and the an upper portion of the first fin structure and an upper portion of the second fin structure protrudes from the isolation structure. The method also includes forming a first transistor and a second transistor on the first fin structure and the second fin structure, and the first transistor includes a first gate dielectric layer. The method further includes forming an inter-layer dielectric (ILD) structure between the first transistor and the second transistor, and a portion of the first gate dielectric layer above the isolation structure is in direct contact with a sidewall of the ILD structure.

公开(公告)号：US09142672B2

公开(公告)日：2015-09-22

申请号：US14023012

申请日：2013-09-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Che-Cheng Chang ,  Tung-Wen Cheng ,  Yi-Jen Chen ,  Yung-Jung Chang

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/36 ,  H01L29/06

CPC分类号： H01L29/66636 ,  H01L21/02532 ,  H01L21/26513 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/3086 ,  H01L29/0603 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/167 ,  H01L29/36 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7848

摘要： Embodiments of mechanisms of forming a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a gate stack structure formed on the substrate. The semiconductor device structure also includes gate spacers formed on sidewalls of the gate stacks. The semiconductor device structure includes doped regions formed in the substrate. The semiconductor device structure also includes a strained source and drain (SSD) structure adjacent to the gate spacers, and the doped regions are adjacent to the SSD structure. The semiconductor device structure includes SSD structure has a tip which is closest to the doped region, and the tip is substantially aligned with an inner side of gate spacers.

摘要翻译： 提供了形成半导体器件结构的机构的实施例。 半导体器件结构包括形成在衬底上的衬底和栅叠层结构。 半导体器件结构还包括形成在栅极堆叠的侧壁上的栅极间隔物。 半导体器件结构包括形成在衬底中的掺杂区域。 半导体器件结构还包括与栅极间隔物相邻的应变源极和漏极（SSD）结构，并且掺杂区域与SSD结构相邻。 半导体器件结构包括SSD结构具有最靠近掺杂区的尖端，并且尖端基本上与栅极间隔物的内侧对准。

公开(公告)号：US10164109B2

公开(公告)日：2018-12-25

申请号：US14609088

申请日：2015-01-29

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Zhe-Hao Zhang ,  Tung-Wen Cheng ,  Che-Cheng Chang ,  Yung-Jung Chang

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L21/306 ,  H01L29/08 ,  H01L29/165 ,  H01L21/311

摘要： A fin field effect transistor (FinFET) device structure and method for forming the FinFET device structure are provided. The FinFET structure includes a substrate, and the substrate includes a core region and an I/O region. The FinFET structure includes a first etched fin structure formed in the core region, and a second etched fin structure formed in the I/O region. The FinFET structure further includes a plurality of gate stack structures formed over the first etched fin structure and the second etched fin structure, and a width of the first etched fin structure is smaller than a width of the second etched fin structure.

公开(公告)号：US09870955B2

公开(公告)日：2018-01-16

申请号：US15456735

申请日：2017-03-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Che-Cheng Chang ,  Yi-Jen Chen ,  Yung-Jung Chang

IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L21/265 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/08 ,  H01L29/423 ,  H01L29/165

CPC分类号： H01L21/823814 ,  H01L21/265 ,  H01L21/2652 ,  H01L21/823412 ,  H01L21/823418 ,  H01L27/0922 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/42364 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7843 ,  H01L29/7848

摘要： A method for forming a semiconductor device structure is provided. The method includes forming a gate stack over a semiconductor substrate and forming a dummy shielding layer over the semiconductor substrate and the gate stack. The method also includes forming source and drain features near the gate stack after the dummy shielding layer is formed. The method further includes removing the dummy shielding layer after the source and drain features are formed such that substantially no dummy shielding layer remains on the source and drain features.

公开(公告)号：US09653605B2

公开(公告)日：2017-05-16

申请号：US14517310

申请日：2014-10-17

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Zhe-Hao Zhang ,  Tung-Wen Cheng ,  Chang-Yin Chen ,  Che-Cheng Chang ,  Yung-Jung Chang

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06 ,  H01L21/762 ,  H01L21/306 ,  H01L29/165

CPC分类号： H01L29/7851 ,  H01L21/30604 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66795 ,  H01L29/7848

摘要： A fin field effect transistor (FinFET) device structure and method for forming FinFET device structure are provided. The FinFET structure includes a substrate and a fin structure extending above the substrate. The FinFET structure includes an epitaxial structure formed on the fin structure, and the epitaxial structure has a first height. The FinFET structure also includes fin sidewall spacers formed adjacent to the epitaxial structure. The sidewall spacers have a second height and the first height is greater than the second height, and the fin sidewall spacers are configured to control a volume and the first height of the epitaxial structure.