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公开(公告)号：US20160373104A1
公开(公告)日：2016-12-22
申请号：US14946559
申请日：2015-11-19
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Jaw-Juinn HORNG , Szu-Lin LIU
Abstract: A circuit is disclosed that includes a first differential input pair and a second differential input pair. The first differential input pair is activated according to an output of the second differential input pair, and receives a first temperature-dependent voltage and an output signal. The second differential input pair is activated according to an output of the first differential input pair, and receives a second temperature-dependent voltage and the output signal. The switching circuit couples a capacitive element to a first voltage supply according to the output of the first differential input pair, and the capacitive element to a second voltage supply according to the output of the second differential input pair, to generate the output signal.
Abstract translation: 公开了一种包括第一差分输入对和第二差分输入对的电路。 第一差分输入对根据第二差分输入对的输出被激活，并且接收第一温度相关电压和输出信号。 第二差分输入对根据第一差分输入对的输出被激活，并且接收第二温度相关电压和输出信号。 根据第二差分输入对的输出，开关电路根据第一差分输入对的输出将电容元件耦合到第一电压源，并根据第二差分输入对的输出将电容元件耦合到第二电压源，以产生输出信号。
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公开(公告)号：US20230124654A1
公开(公告)日：2023-04-20
申请号：US18066690
申请日：2022-12-15
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Szu-Lin LIU , Jaw-Juinn HORNG
Abstract: A trimmable resistor circuit and a method for operating the trimmable resistor circuit are provided. The trimmable resistor circuit includes first sources/drains and first gate structures alternatively arranged in a first row, second sources/drains and second gate structures alternatively arranged in a second row, third sources/drains and third gate structures alternatively arranged in a third row, first resistors disposed between the first row and the second row, and second resistors disposed between the second row and the third row. In the method for operating the trimmable resistor circuit, the first gate structures in the first row and the third gate structures in the third row are turned on. Then, the second gate structures in the second row are turned on/off according to a predetermined resistance value.
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公开(公告)号：US20190234807A1
公开(公告)日：2019-08-01
申请号：US16378277
申请日：2019-04-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Szu-Lin LIU , Jaw-Juinn HORNG , Yung-Chow PENG
Abstract: A three-dimensional integrated circuit includes a first layer including at least one sensing element configured to output at least one temperature-dependent voltage; and a second layer disposed vertically with respect to the first layer and coupled to the first layer by at least one via. The second layer includes: a compare circuit configured to generate at least one intermediate voltage in response to comparing the at least one temperature-dependent voltage to a feedback voltage; a control circuit configured to generate at least one control signal in response to the intermediate voltage; and a switching circuit configured to couple a capacitor coupled to a feedback node to one of a first voltage supply and a second voltage supply in response to the at least one control signal to generate an output signal that is based on a temperature sensed by the sensing element.
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公开(公告)号：US20230343785A1
公开(公告)日：2023-10-26
申请号：US18343447
申请日：2023-06-28
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Yi-Hsiang WANG , Szu-Lin LIU , Jaw-Juinn HORNG , Yung-Chow PENG
IPC: H01L27/092 , H01L21/8238 , H03K17/687 , H01L23/64 , H01L27/02
CPC classification number: H01L27/0921 , H01L21/823814 , H03K17/6872 , H01L23/642 , H01L21/823871 , H01L27/0222
Abstract: A method of manufacturing an integrated circuit (IC) device includes forming a metal oxide semiconductor (MOS) transistor including a first gate and first and second source/drain (S/D) regions, the first and second S/D regions having a first doping type and being formed in a substrate region having a second doping type different from the first doping type, forming a guard ring structure surrounding the MOS transistor, the guard ring structure including a second gate and first and second heavily doped regions, the first and second heavily doped regions being formed in the substrate region and having the second doping type, and constructing a first electrical connection between the first and second gates.
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公开(公告)号：US20210123816A1
公开(公告)日：2021-04-29
申请号：US17140722
申请日：2021-01-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Szu-Lin LIU , Jaw-Juinn Horng , Yung-Chow Peng
Abstract: A three-dimensional integrated circuit includes a first layer including at least one sensing element configured to output at least one temperature-dependent voltage; and a second layer disposed vertically with respect to the first layer and coupled to the first layer by at least one via. The second layer includes: a compare circuit configured to generate at least one intermediate voltage in response to comparing the at least one temperature-dependent voltage to a feedback voltage; a control circuit configured to generate at least one control signal in response to the intermediate voltage; and a switching circuit configured to couple a capacitor coupled to a feedback node to one of a first voltage supply and a second voltage supply in response to the at least one control signal to generate an output signal that is based on a temperature sensed by the sensing element.
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Patent Agency Ranking
公开(公告)号：US20210091071A1
公开(公告)日：2021-03-25
申请号：US17112136
申请日：2020-12-04
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Szu-Lin LIU , Jaw-Juinn HORNG
Abstract: A trimmable resistor circuit and a method for operating the trimmable resistor circuit are provided. The trimmable resistor circuit includes first sources/drains and first gate structures alternatively arranged in a first row, second sources/drains and second gate structures alternatively arranged in a second row, third sources/drains and third gate structures alternatively arranged in a third row, first resistors disposed between the first row and the second row, and second resistors disposed between the second row and the third row. In the method for operating the trimmable resistor circuit, the first gate structures in the first row and the third gate structures in the third row are turned on. Then, the second gate structures in the second row are turned on/off according to a predetermined resistance value.
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公开(公告)号：US20200058648A1
公开(公告)日：2020-02-20
申请号：US16168986
申请日：2018-10-24
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Szu-Lin LIU , Jaw-Juinn HORNG
Abstract: A trimmable resistor circuit and a method for operating the trimmable resistor circuit are provided. The trimmable resistor circuit includes first sources/drains and first gate structures alternatively arranged in a first row, second sources/drains and second gate structures alternatively arranged in a second row, third sources/drains and third gate structures alternatively arranged in a third row, first resistors disposed between the first row and the second row, and second resistors disposed between the second row and the third row. In the method for operating the trimmable resistor circuit, the first gate structures in the first row and the third gate structures in the third row are turned on. Then, the second gate structures in the second row are turned on/off according to a predetermined resistance value.
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公开(公告)号：US20180073934A1
公开(公告)日：2018-03-15
申请号：US15818655
申请日：2017-11-20
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Jaw-Juinn HORNG , Szu-Lin LIU
Abstract: A circuit is disclosed that includes a first differential input pair, a second differential input pair, and a capacitive element. The first differential input pair is configured to be activated according to an output of the second differential input pair, and the second differential input pair is configured to be activated according to an output of the first differential input pair. The first differential input pair and the second differential input pair each comprises an input configured to receive an output signal. The capacitive element configured to be charged according to the output of the first differential input pair, and configured to be discharged according to the output of the second differential input pair, in order to generate the output signal.
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公开(公告)号：US20170184459A1
公开(公告)日：2017-06-29
申请号：US15460098
申请日：2017-03-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Szu-Lin LIU , Jaw-Juinn HORNG , Yung-Chow PENG
IPC: G01K7/21
Abstract: A three-dimensional integrated circuit includes a first layer including at least one sensing element configured to output at least one temperature-dependent voltage; and a second layer disposed vertically with respect to the first layer and coupled to the first layer by at least one via. The second layer includes: a compare circuit configured to generate at least one intermediate voltage in response to comparing the at least one temperature-dependent voltage to a feedback voltage; a control circuit configured to generate at least one control signal in response to the intermediate voltage; and a switching circuit configured to couple a capacitor coupled to a feedback node to one of a first voltage supply and a second voltage supply in response to the at least one control signal to generate an output signal that is based on a temperature sensed by the sensing element.
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公开(公告)号：US20210341339A1
公开(公告)日：2021-11-04
申请号：US17378540
申请日：2021-07-16
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Jaw-Juinn HORNG , Szu-Lin LIU
Abstract: A circuit is disclosed that includes a first differential input pair, a second differential input pair, a first switch, and a second switch. The first differential input pair receives an output voltage at an output node and a first temperature-dependent voltage. The second differential input pair receives the output voltage and a second temperature-dependent voltage. When the output voltage reaches the second temperature-dependent voltage, the first switch is turned on to pull up the output voltage in response to a first control signal generated according to an output signal of the second differential input pair. When the output voltage reaches the first temperature-dependent voltage, the second switch is turned on to pull down the output voltage in response to a second control signal generated according to an output signal of the first differential input pair.
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