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公开(公告)号：US11526081B2
公开(公告)日：2022-12-13
申请号：US17366319
申请日：2021-07-02
发明人： Shih-Ming Chang , Wen Lo , Chun-Hung Liu , Chia-Hua Chang , Hsin-Wei Wu , Ta-Wei Ou , Chien-Chih Chen , Chien-Cheng Chen
摘要： An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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公开(公告)号：US20210405534A1
公开(公告)日：2021-12-30
申请号：US17366319
申请日：2021-07-02
发明人： Shih-Ming Chang , Wen Lo , Chun-Hung Liu , Chia-Hua Chang , Hsin-Wei Wu , Ta-Wei Ou , Chien-Chih Chen , Chien-Cheng Chen
摘要： An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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公开(公告)号：US11054748B2
公开(公告)日：2021-07-06
申请号：US16138402
申请日：2018-09-21
发明人： Shih-Ming Chang , Wen Lo , Chun-Hung Liu , Chia-Hua Chang , Hsin-Wei Wu , Ta-Wei Ou , Chien-Chih Chen , Chien-Cheng Chen
摘要： An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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公开(公告)号：US20200098545A1
公开(公告)日：2020-03-26
申请号：US16138402
申请日：2018-09-21
发明人： Shih-Ming Chang , Wen Lo , Chun-Hung Liu , Chia-Hua Chang , Hsin-Wei Wu , Ta-Wei Ou , Chien-Chih Chen , Chien-Cheng Chen
IPC分类号： H01J37/317 , H01J37/302 , G03F7/20 , G03F1/78
摘要： An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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公开(公告)号：US11899367B2
公开(公告)日：2024-02-13
申请号：US18064548
申请日：2022-12-12
发明人： Shih-Ming Chang , Wen Lo , Chun-Hung Liu , Chia-Hua Chang , Hsin-Wei Wu , Ta-Wei Ou , Chien-Chih Chen , Chien-Cheng Chen
CPC分类号： G03F7/2061 , G03F1/36 , G03F1/78
摘要： An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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公开(公告)号：US20230273524A1
公开(公告)日：2023-08-31
申请号：US18064548
申请日：2022-12-12
发明人： Shih-Ming Chang , Wen Lo , Chun-Hung Liu , Chia-Hua Chang , Hsin-Wei Wu , Ta-Wei Ou , Chien-Chih Chen , Chien-Cheng Chen
CPC分类号： G03F7/2061 , G03F1/36 , G03F1/78
摘要： An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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