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公开(公告)号：US20240395776A1
公开(公告)日：2024-11-28
申请号：US18790261
申请日：2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Haohua Zhou , Mei Hsu Wong , Tze-Chiang Huang
IPC: H01L25/065 , H01L23/525 , H03K5/24 , H03K19/20
Abstract: A plurality of semiconductor devices are arranged in a stack. Individual semiconductor devices within the stack are selected by an identity signal sent into the stack. The signal is compared within each stack to a unique stack identifier stored within each of the semiconductor devices and, when the signal is the same as the unique stack identifier, the semiconductor device is selected while, when the signal is not the same as the unique stack identifier, the semiconductor device remains within the default bypass mode.
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公开(公告)号：US10345883B2
公开(公告)日：2019-07-09
申请号：US15169635
申请日：2016-05-31
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Kai-Yuan Ting , Shereef Shehata , Tze-Chiang Huang , Sandeep Kumar Goel , Mei Wong , Yun-Han Lee
IPC: G06F9/00 , G06F1/3228 , G06F1/28
Abstract: A power state transformer, a system and a method thereof are disclosed. The power state transformer is coupled with a processing unit model. The power state transformer is configured for counting performance activities executed in the processing unit model, and further for determining a power state of the processing unit model according to count values of the performance activities.
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3.发明申请公开(公告)号：US20180314781A1
公开(公告)日：2018-11-01
申请号：US15724671
申请日：2017-10-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Charlie ZHOU , Tze-Chiang Huang , Jack Liu
CPC classification number: G06F17/5036 , G06F7/588 , G06F2207/583
Abstract: A true random metastable flip-flop (TRMFF) complier generates an electrical architecture for a TRMFF chain. The complier selects components for the TRMFF chain from a library of standard cells and logically connects these components in accordance with a primitive polynomial to generate the electrical architecture. The TRMFF chain provides a sequence of random numbers from one or more physical processes in accordance with the primitive polynomial. During operation, one or more microscopic phenomena inside and/or outside of the TRMFF chain can cause one or more low-level, statistically random entropy noise signals to be present within the TRMFF chain. The TRMFF chain advantageously utilizes the one or more low-level, statistically random entropy noise signals to provide the sequence of random numbers.
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公开(公告)号：US20230343754A1
公开(公告)日：2023-10-26
申请号：US18344282
申请日：2023-06-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Haohua Zhou , Mei Hsu Wong , Tze-Chiang Huang
IPC: H01L25/065 , H01L23/525 , H03K5/24 , H03K19/20
CPC classification number: H01L25/0657 , H01L23/5256 , H03K5/24 , H03K19/20 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541
Abstract: A plurality of semiconductor devices are arranged in a stack. Individual semiconductor devices within the stack are selected by an identity signal sent into the stack. The signal is compared within each stack to a unique stack identifier stored within each of the semiconductor devices and, when the signal is the same as the unique stack identifier, the semiconductor device is selected while, when the signal is not the same as the unique stack identifier, the semiconductor device remains within the default bypass mode.
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公开(公告)号：US11735565B2
公开(公告)日：2023-08-22
申请号：US17135312
申请日：2020-12-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Haohua Zhou , Mei Hsu Wong , Tze-Chiang Huang
IPC: H01L25/065 , H01L23/525 , H03K5/24 , H03K19/20
CPC classification number: H01L25/0657 , H01L23/5256 , H03K5/24 , H03K19/20 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541
Abstract: A plurality of semiconductor devices are arranged in a stack. Individual semiconductor devices within the stack are selected by an identity signal sent into the stack. The signal is compared within each stack to a unique stack identifier stored within each of the semiconductor devices and, when the signal is the same as the unique stack identifier, the semiconductor device is selected while, when the signal is not the same as the unique stack identifier, the semiconductor device remains within the default bypass mode.
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Patent Agency Ranking
公开(公告)号：US11687472B2
公开(公告)日：2023-06-27
申请号：US16999055
申请日：2020-08-20
Inventor： Igor Elkanovich , Amnon Parnass , Pei Yu , Li-Ken Yeh , Yung-Sheng Fang , Sheng-Wei Lin , Tze-Chiang Huang , King Ho Tam , Ching-Fang Chen
IPC: G06F13/16 , H01L25/065 , H01L23/00 , H03K3/037 , H03L7/081
CPC classification number: G06F13/1689 , H01L24/06 , H01L24/17 , H01L25/0657 , H01L24/73 , H01L2224/0401 , H01L2225/06541 , H01L2924/1432 , H01L2924/1436 , H01L2924/1437 , H03K3/0372 , H03L7/081
Abstract: An interface for a semiconductor device is provided. The semiconductor device has a master device and multiple slave devices as stacked up with electric connection. The interface includes a master interface, implemented in the master device and including a master interface circuit with a master bond pattern. Further, a slave interface is implemented in each slave device and includes a slave interface circuit with a slave bond pattern to correspondingly connect to the master bond pattern. A clock route is to transmit a clock signal through the master interface and the slave interface. The master device transmits a command and a selecting slave identification through the master interface to all the slave interfaces. One of the slave devices corresponding to the selecting slave identification executes the command and responds a result back to the master device through the slave interfaces and the master interface.
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公开(公告)号：US11568116B2
公开(公告)日：2023-01-31
申请号：US16727460
申请日：2019-12-26
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Charlie Zhou , Tze-Chiang Huang , Jack Liu
IPC: G06F30/367 , G06F7/58
Abstract: A true random metastable flip-flop (TRMFF) compiler generates an electrical architecture for a TRMFF chain. The compiler selects components for the TRMFF chain from a library of standard cells and logically connects these components in accordance with a primitive polynomial to generate the electrical architecture. The TRMFF chain provides a sequence of random numbers from one or more physical processes in accordance with the primitive polynomial. During operation, one or more microscopic phenomena inside and/or outside of the TRMFF chain can cause one or more low-level, statistically random entropy noise signals to be present within the TRMFF chain. The TRMFF chain advantageously utilizes the one or more low-level, statistically random entropy noise signals to provide the sequence of random numbers.
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公开(公告)号：US11163351B2
公开(公告)日：2021-11-02
申请号：US16505347
申请日：2019-07-08
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Kai-Yuan Ting , Shereef Shehata , Tze-Chiang Huang , Sandeep Kumar Goel , Mei Wong , Yun-Han Lee
IPC: G06F1/28 , G06F1/3228
Abstract: A device for power estimation is disclosed. The device includes a transformer circuit coupled with a processing circuit and a transaction interface. The transformer circuit is configured to count performance activities executed in the processing circuit and to compare count values of the performance activities with a predetermined value to determine a power state of the processing circuit. The transaction interface is configured to receive a request from the processing circuit and record a first timestamp, and further configured to receive a response from a memory model and record a second timestamp, the transaction interface being further configured to record a time difference between the first timestamp and the second timestamp as a time difference. The transformer circuit is further configured to determine the power state of the processing circuit based on both of the count values and the time difference.
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公开(公告)号：US10540462B2
公开(公告)日：2020-01-21
申请号：US15645938
申请日：2017-07-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chih-Yuan Stephen Yu , Wenyuan Lee , Boh-Yi Huang , Brent Lui , Tze-Chiang Huang
Abstract: A method includes providing a register transfer level (RTL) description of a circuit design, providing a plurality of RTL-to-gate-level mapping details by translating the RTL description into a gate-level netlist, providing one or more input/output (I/O) variables as stimulus to simulate the RTL description of the circuit design, capturing a plurality of internal operation values from the simulated RTL description at a beginning time of a specified period of time wherein the specified period of time is less than a time period required to compete a full-scale simulation, mapping the captured internal operation values to corresponding gate-level nodes of the gate-level netlist, capturing a plurality of I/O values from the I/O variables at the beginning time of the specified period of time, and simulating the circuit design in a gate-level for the specified period of time based on the mapped internal operation values and the captured I/O values.
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公开(公告)号：US11671010B2
公开(公告)日：2023-06-06
申请号：US16991335
申请日：2020-08-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Alan Roth , Haohua Zhou , Eric Soenen , Ying-Chih Hsu , Paul Ranucci , Mei Hsu Wong , Tze-Chiang Huang
IPC: H02M3/156 , H01L23/498 , H01L23/58 , H01L23/495
CPC classification number: H02M3/156 , H01L23/49589 , H01L23/49811 , H01L23/49838 , H01L23/58
Abstract: A semiconductor structure includes a first substrate. A first die and a second die are disposed over the first substrate and are adjacent to one another. A plurality of first conductive bumps are disposed between the first substrate and the first die and between the first substrate and the second die. A second substrate is disposed below the first substrate. A plurality of second conductive bumps is disposed between the first substrate and the second substrate. An in-package voltage regulator (PVR) chip is disposed over the second substrate. A molding material is disposed over the first substrate and surrounds the first die, the second die, the plurality of first conductive bumps, the plurality of second conductive bumps, and the PVR chip.
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