公开(公告)号：US11171634B2

公开(公告)日：2021-11-09

申请号：US16875849

申请日：2020-05-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Hui Chen ,  Wan-Yen Lin ,  Chia-Jung Chang

IPC: H03K19/185 ,  H03K3/037 ,  H03K19/0185

Abstract: A circuit includes a first inverter and a second inverter. The first inverter is coupled to an input terminal. The input terminal receives an input signal varying in a first voltage domain. The second inverter is coupled between the first inverter and an output terminal. The second inverter generates an output signal varying in a second voltage domain. The first inverter includes a first PMOS transistor and a first NMOS transistor. The first PMOS transistor is biased by a first input tracking signal generated from the input signal. The first input tracking signal varies in a third voltage domain. The first NMOS transistor is biased by a second input tracking signal generated from the input signal. The second input tracking signal varies in the second voltage domain.

公开(公告)号：US20190173471A1

公开(公告)日：2019-06-06

申请号：US16156507

申请日：2018-10-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hui Chen ,  Wan-Yen Lin ,  Tsung-Hsin Yu

IPC: H03K19/003 ,  H03K3/356

Abstract: A circuit includes: a first type of swing reduction circuit coupled between an input/output pad and a buffer circuit; and a second type of swing reduction circuit coupled between the input/output pad and the buffer circuit, wherein the first type of swing reduction circuit is configured to increase a voltage received by respective gates of a first subset of transistors of the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage, and the second type of swing reduction circuit is configured to reduce a voltage received by respective gates of a second subset of transistors of the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.

公开(公告)号：US09449959B2

公开(公告)日：2016-09-20

申请号：US13921226

申请日：2013-06-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wan-Yen Lin ,  Jam-Wem Lee

IPC: H02H9/04 ,  H01L27/02

CPC classification number: H01L27/0259 ,  H02H9/046

Abstract: A device includes a first bidirectional PNP circuit coupled to a first output of an communication circuit, and a second bidirectional PNP circuit coupling to a second output of the communication circuit. The first and second bi-direction PNP circuits have coupled outputs and a first breakdown voltage. A third bidirectional PNP circuit is coupled to ground via the coupled outputs of the first bidirectional PNP circuit and of the second bidirectional PNP circuit. The third bidirectional PNP circuit has a second breakdown voltage. In some arrangements, a sum of the first breakdown voltage and the second breakdown voltage exceeds 60 volts. The communication circuit can be an automotive application circuit for a serial automotive communication application. The first and second bidirectional transistor circuits can form a part of a cell of an integrated circuit having an isolation structure to sustain high voltage.

Abstract translation: 一种设备包括耦合到通信电路的第一输出的第一双向PNP电路和耦合到通信电路的第二输出的第二双向PNP电路。 第一和第二双向PNP电路具有耦合输出和第一击穿电压。 第三双向PNP电路经由第一双向PNP电路和第二双向PNP电路的耦合输出耦合到地。 第三双向PNP电路具有第二击穿电压。 在一些布置中，第一击穿电压和第二击穿电压之和超过60伏特。 通信电路可以是用于串行汽车通信应用的汽车应用电路。 第一和第二双向晶体管电路可以形成具有隔离结构以保持高电压的集成电路的单元的一部分。

公开(公告)号：US20200052699A1

公开(公告)日：2020-02-13

申请号：US16654677

申请日：2019-10-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hui Chen ,  Wan-Yen Lin ,  Tsung-Hsin Yu

IPC: H03K19/003 ,  H03K3/356

Abstract: A circuit includes: a first swing reduction circuit coupled between an input/output pad and a buffer circuit, and a second swing reduction circuit coupled between the input/output pad and the buffer circuit. The first swing reduction circuit comprises a first transistor gated by a first bias voltage and comprises a second transistor drained by the first bias voltage. The first swing reduction circuit is configured to increase a voltage at a first node in the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage. The second swing reduction circuit is configured to reduce a voltage at a second node in the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.

公开(公告)号：US11190187B2

公开(公告)日：2021-11-30

申请号：US17001022

申请日：2020-08-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hui Chen ,  Wan-Yen Lin ,  Tsung-Hsin Yu

IPC: H03K19/003 ,  H03K17/00 ,  H03K3/356

Abstract: A circuit includes: a first swing reduction circuit coupled between an input/output pad and a buffer circuit, and a second swing reduction circuit coupled between the input/output pad and the buffer circuit. The first swing reduction circuit comprises a first transistor gated by a first bias voltage and comprises a second transistor drained by the first bias voltage. The first swing reduction circuit is configured to increase a voltage at a first node in the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage. The second swing reduction circuit is configured to reduce a voltage at a second node in the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.

公开(公告)号：US10483973B2

公开(公告)日：2019-11-19

申请号：US16156507

申请日：2018-10-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hui Chen ,  Wan-Yen Lin ,  Tsung-Hsin Yu

IPC: H03K19/003 ,  H03K17/00 ,  H03K3/356

Abstract: A circuit includes: a first type of swing reduction circuit coupled between an input/output pad and a buffer circuit; and a second type of swing reduction circuit coupled between the input/output pad and the buffer circuit, wherein the first type of swing reduction circuit is configured to increase a voltage received by respective gates of a first subset of transistors of the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage, and the second type of swing reduction circuit is configured to reduce a voltage received by respective gates of a second subset of transistors of the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.

公开(公告)号：US10756735B2

公开(公告)日：2020-08-25

申请号：US16654677

申请日：2019-10-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chia-Hui Chen ,  Wan-Yen Lin ,  Tsung-Hsin Yu

IPC: H03K19/003 ,  H03K17/00 ,  H03K3/356

Abstract: A circuit includes: a first swing reduction circuit coupled between an input/output pad and a buffer circuit, and a second swing reduction circuit coupled between the input/output pad and the buffer circuit. The first swing reduction circuit comprises a first transistor gated by a first bias voltage and comprises a second transistor drained by the first bias voltage. The first swing reduction circuit is configured to increase a voltage at a first node in the buffer circuit when a voltage applied on the input/output pad is equal to a first supply voltage. The second swing reduction circuit is configured to reduce a voltage at a second node in the buffer circuit when the voltage applied on the input/output pad is equal to a second supply voltage.