公开(公告)号：US20220099726A1

公开(公告)日：2022-03-31

申请号：US17039627

申请日：2020-09-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann LAI ,  Ruo-Rung HUANG ,  Kun-Lung CHEN ,  Chun-Yi YANG ,  Chan-Hong CHERN

IPC: G01R31/26 ,  H03K17/687 ,  H03K3/017 ,  G01R31/27

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

公开(公告)号：US20250060404A1

公开(公告)日：2025-02-20

申请号：US18936841

申请日：2024-11-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann LAI ,  Ruo-Rung HUANG ,  Kun-Lung CHEN ,  Chun-Yi YANG ,  Chan-Hong CHERN

IPC: G01R31/26 ,  G01R31/27 ,  H03K3/017 ,  H03K17/687

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

公开(公告)号：US20230280391A1

公开(公告)日：2023-09-07

申请号：US18196380

申请日：2023-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann LAI ,  Ruo-Rung HUANG ,  Kun-Lung CHEN ,  Chun-Yi YANG ,  Chan-Hong CHERN

IPC: G01R31/26 ,  H03K17/687 ,  G01R31/27 ,  H03K3/017

CPC classification number: G01R31/2621 ,  H03K17/6871 ,  G01R31/27 ,  H03K3/017 ,  H03K2217/0072 ,  H03K2217/0063

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.