公开(公告)号：US20240421194A1

公开(公告)日：2024-12-19

申请号：US18336382

申请日：2023-06-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-An LAI ,  Pan Chieh Yu ,  Chih-Hua WANG ,  Chan-Hong CHERN ,  Cheng-Hsiang HSIEH

IPC: H01L29/20 ,  H01L29/40 ,  H01L29/66 ,  H01L29/778

Abstract: The present disclosure describes a semiconductor device having artificial field plates. The semiconductor device includes a first gallium nitride (GaN) layer on a substrate, an aluminum gallium nitride (AlGaN) layer on the first GaN layer, and a second GaN layer on the AlGaN layer. The first and second GaN layers includes different types of dopants. The semiconductor device further includes a gate contact structure in contact with the second GaN layer, first and second source/drain (S/D) contact structures in contact with the AlGaN layer, one or more artificial field plates between the gate contact structure and the first S/D contact structure. The first and second S/D contact structures are disposed at opposite sides of the gate contact structure. The one or more artificial field plates are separated from the first and second S/D contact structures and above the AlGaN layer.

公开(公告)号：US20220155524A1

公开(公告)日：2022-05-19

申请号：US17097270

申请日：2020-11-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiwei SONG ,  Chan-Hong CHERN ,  Chewn-Pu JOU ,  Stefan RUSU ,  Min-Hsiang HSU

IPC: G02B6/26 ,  G02B6/30

Abstract: An optical system with different optical coupling device configurations and a method of fabricating the same are disclosed. An optical system includes a substrate, a waveguide disposed on the substrate, an optical fiber optically coupled to the waveguide, and an optical coupling device disposed between the optical fiber and the waveguide. The optical coupling device configured to optically couple the optical fiber to the waveguide. The optical coupling device includes a dielectric layer disposed on the substrate, a semiconductor tapered structure disposed in a first horizontal plane within the dielectric layer, and a multi-tip dielectric structure disposed in a second horizontal plane within the dielectric layer. The first and second horizontal planes are different from each other

公开(公告)号：US20250159982A1

公开(公告)日：2025-05-15

申请号：US19022570

申请日：2025-01-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong CHERN

IPC: H10D84/86 ,  H01L21/02 ,  H03K17/16 ,  H10D30/01 ,  H10D30/47 ,  H10D62/824 ,  H10D62/85 ,  H10D64/27 ,  H10D64/66 ,  H10D84/05

Abstract: Apparatus and circuits with dual threshold voltage transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first layer comprising a first III-V semiconductor material formed over the substrate; a first transistor formed over the first layer, and a second transistor formed over the first layer. The first transistor comprises a first gate structure comprising a first material, a first source region and a first drain region. The second transistor comprises a second gate structure comprising a second material, a second source region and a second drain region. The first material is different from the second material.

公开(公告)号：US20210226049A1

公开(公告)日：2021-07-22

申请号：US17222909

申请日：2021-04-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong CHERN

IPC: H01L29/778 ,  H01L27/07 ,  H01L29/66 ,  H03K17/567

Abstract: Apparatus and circuits with dual polarization transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a first active portion having a first thickness and a second active portion having a second thickness; a first transistor comprising a first source region, a first drain region, and a first gate structure formed over the first active portion and between the first source region and the first drain region; and a second transistor comprising a second source region, a second drain region, and a second gate structure formed over the second active portion and between the second source region and the second drain region, wherein the first thickness is different from the second thickness.

公开(公告)号：US20250060404A1

公开(公告)日：2025-02-20

申请号：US18936841

申请日：2024-11-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann LAI ,  Ruo-Rung HUANG ,  Kun-Lung CHEN ,  Chun-Yi YANG ,  Chan-Hong CHERN

IPC: G01R31/26 ,  G01R31/27 ,  H03K3/017 ,  H03K17/687

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

公开(公告)号：US20230280391A1

公开(公告)日：2023-09-07

申请号：US18196380

申请日：2023-05-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Ann LAI ,  Ruo-Rung HUANG ,  Kun-Lung CHEN ,  Chun-Yi YANG ,  Chan-Hong CHERN

IPC: G01R31/26 ,  H03K17/687 ,  G01R31/27 ,  H03K3/017

CPC classification number: G01R31/2621 ,  H03K17/6871 ,  G01R31/27 ,  H03K3/017 ,  H03K2217/0072 ,  H03K2217/0063

Abstract: An apparatus and method for testing gallium nitride field effect transistors (GaN FETs) are disclosed herein. In some embodiments, the apparatus includes: a high side GaN FET, a low side GaN FET, a high side driver coupled to a gate of the high side GaN FET, a low side driver coupled to a gate of the low side GaN FET, and a driver circuit coupled to the high side and low side drivers and configured to generate drive signals capable of driving the high and low side GaN FETs, wherein the high and low side GaN FETs and transistors, within the high and low side drivers and the driver circuit, are patterned on a same semiconductor device layer during a front-end-of-line (FEOL) process.

公开(公告)号：US20230187440A1

公开(公告)日：2023-06-15

申请号：US18104734

申请日：2023-02-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong CHERN

IPC: H01L27/088 ,  H01L29/778 ,  H03K17/687 ,  H01L21/8252 ,  H01L29/43 ,  H01L29/66

CPC classification number: H01L27/0883 ,  H01L21/8252 ,  H01L29/432 ,  H01L29/7786 ,  H01L29/66462 ,  H03K17/6871

Abstract: Apparatus and circuits including transistors with different threshold voltages and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active layer that is formed over the substrate and comprises a plurality of active portions; a polarization modulation layer comprising a plurality of polarization modulation portions each of which is disposed on a corresponding one of the plurality of active portions; and a plurality of transistors each of which comprises a source region, a drain region, and a gate structure formed on a corresponding one of the plurality of polarization modulation portions. The transistors have at least three different threshold voltages.

公开(公告)号：US20220276453A1

公开(公告)日：2022-09-01

申请号：US17186661

申请日：2021-02-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong CHERN ,  Min-Hsiang HSU

IPC: G02B6/42

Abstract: Disclosed are apparatus and methods for optical coupling in optical communications. In one embodiment, an apparatus for optical coupling is disclosed. The apparatus includes: a planar layer; an array of scattering elements arranged in the planar layer at a plurality of intersections of a first set of concentric elliptical curves crossing with a second set of concentric elliptical curves rotated proximately 90 degrees to form a two-dimensional (2D) grating; a first taper structure formed in the planar layer connecting a first convex side of the 2D grating to a first waveguide; and a second taper structure formed in the planar layer connecting a second convex side of the 2D grating to a second waveguide. Each scattering element is a pillar into the planar layer. The pillar has a top surface whose shape is a concave polygon having at least 6 corners.

公开(公告)号：US20210091246A1

公开(公告)日：2021-03-25

申请号：US16994982

申请日：2020-08-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong CHERN

IPC: H01L31/0352 ,  H01L31/0224 ,  H01L31/18

Abstract: A photodetector is provided. The photodetector includes a semiconductor layer, a first superlattice structure in the semiconductor layer, and a light absorption material above the first superlattice structure. The first superlattice structure includes vertically stacked pairs of silicon layer/first silicon germanium layer. The first silicon germanium layers are made of Si1-xGex, and xi s the atomic percentage of germanium and 0.1≤x≤0.9.

公开(公告)号：US20210088726A1

公开(公告)日：2021-03-25

申请号：US16919747

申请日：2020-07-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chan-Hong CHERN ,  Min-Hsiang HSU

IPC: G02B6/136 ,  G02B6/122

Abstract: A photonic structure is provided. The photonic structure includes a semiconductor substrate, a buried oxide layer over the semiconductor substrate, an optical coupling region over the buried oxide layer, and an oxide structure embedded in the semiconductor substrate. The optical coupling region is tapered toward a terminus of the optical coupling region located at an edge of the semiconductor substrate. The optical coupling region overlaps the oxide structure in a plan view.