公开(公告)号：US20190259847A1

公开(公告)日：2019-08-22

申请号：US16398079

申请日：2019-04-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Wen HUANG ,  Yun-Wen CHU ,  Hong-Hsien KE ,  Chia-Hui LIN ,  Shin-Yeu TSAI ,  Shih-Chieh CHANG

IPC: H01L29/423 ,  H01L29/66 ,  H01L21/311 ,  H01L21/02 ,  H01L29/78 ,  H01L29/06 ,  H01L29/40

Abstract: Semiconductor device structures and methods for forming the same are provided. A semiconductor device structure includes a gate structure over a semiconductor substrate. The gate structure includes a gate electrode layer and a gate dielectric layer covering a bottom surface and sidewalls of the gate electrode layer. The semiconductor device structure also includes spacer elements in contact with sidewalls of the gate structure and protruding from a top surface of the gate electrode layer. The semiconductor device structure also includes a first protection layer over the gate electrode layer and between the spacer elements. The semiconductor device structure also includes a dielectric layer over the first protection layer and between the spacer elements. A portion of the dielectric layer is between sidewalls of the spacer elements and sidewalls of the first protection layer.

公开(公告)号：US20180151680A1

公开(公告)日：2018-05-31

申请号：US15494023

申请日：2017-04-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Wen HUANG ,  Yun-Wen CHU ,  Hong-Hsien KE ,  Chia-Hui LIN ,  Shin-Yeu TSAI ,  Shih-Chieh CHANG

IPC: H01L29/423 ,  H01L21/02 ,  H01L29/40 ,  H01L21/311 ,  H01L29/78 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/4232 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02244 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L29/0649 ,  H01L29/401 ,  H01L29/66545 ,  H01L29/78

Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.