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公开(公告)号:US20200235214A1
公开(公告)日:2020-07-23
申请号:US16838160
申请日:2020-04-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wen HUANG , Chung-Ting KO , Hong-Hsien KE , Chia-Hui LIN , Tai-Chun HUANG
IPC: H01L29/417 , H01L21/3115 , H01L21/02 , H01L21/311 , H01L21/8234 , H01L29/66 , H01L21/768 , H01L29/45 , H01L29/08 , H01L29/78
Abstract: A method for forming a semiconductor structure is provided. The method includes forming a gate structure over a fin structure, forming a source/drain structure in the fin structure and adjacent to the gate structure, forming a dielectric layer over the gate structure and the source/drain structure, and forming an opening in the dielectric layer to expose the source/drain structure. The method further includes depositing a barrier layer lining a sidewall surface of the opening and a top surface of the source/drain structure. The method further includes etching a portion of the barrier layer to expose the source/drain structure. The method further includes depositing a glue layer covering the sidewall surface of the opening and the source/drain structure in the opening. The method further includes forming a contact structure filling the opening in the dielectric layer. The contact structure is surrounded by the glue layer.
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公开(公告)号:US20190157405A1
公开(公告)日:2019-05-23
申请号:US15992619
申请日:2018-05-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wen HUANG , Chung-Ting KO , Hong-Hsien KE , Chia-Hui LIN , Tai-Chun HUANG
IPC: H01L29/417 , H01L29/78 , H01L29/08 , H01L29/45 , H01L21/768 , H01L21/311 , H01L21/02 , H01L29/66 , H01L21/8234
Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure, a gate spacer, a source/drain structure, a contact structure, a glue layer and a barrier layer. The gate structure is positioned over a fin structure. The gate spacer is positioned over the fin structure and on a sidewall surface of the gate structure. The source/drain structure is positioned in the fin structure and adjacent to the gate spacer. The contact structure is positioned over the source/drain structure. The glue layer covers a bottom surface and a sidewall surface of the contact structure. The barrier layer encircles the sidewall surface of the contact structure. A bottom surface of the glue layer is exposed to the barrier layer.
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公开(公告)号:US20190164844A1
公开(公告)日:2019-05-30
申请号:US15922656
申请日:2018-03-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wen HUANG , Chia-Hui LIN , Jaming CHANG , Jei Ming CHEN , Kai Hung CHENG
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/02 , H01L21/762
Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.
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公开(公告)号:US20190259847A1
公开(公告)日:2019-08-22
申请号:US16398079
申请日:2019-04-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wen HUANG , Yun-Wen CHU , Hong-Hsien KE , Chia-Hui LIN , Shin-Yeu TSAI , Shih-Chieh CHANG
IPC: H01L29/423 , H01L29/66 , H01L21/311 , H01L21/02 , H01L29/78 , H01L29/06 , H01L29/40
Abstract: Semiconductor device structures and methods for forming the same are provided. A semiconductor device structure includes a gate structure over a semiconductor substrate. The gate structure includes a gate electrode layer and a gate dielectric layer covering a bottom surface and sidewalls of the gate electrode layer. The semiconductor device structure also includes spacer elements in contact with sidewalls of the gate structure and protruding from a top surface of the gate electrode layer. The semiconductor device structure also includes a first protection layer over the gate electrode layer and between the spacer elements. The semiconductor device structure also includes a dielectric layer over the first protection layer and between the spacer elements. A portion of the dielectric layer is between sidewalls of the spacer elements and sidewalls of the first protection layer.
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公开(公告)号:US20180151680A1
公开(公告)日:2018-05-31
申请号:US15494023
申请日:2017-04-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Shih-Wen HUANG , Yun-Wen CHU , Hong-Hsien KE , Chia-Hui LIN , Shin-Yeu TSAI , Shih-Chieh CHANG
IPC: H01L29/423 , H01L21/02 , H01L29/40 , H01L21/311 , H01L29/78 , H01L29/66 , H01L29/06
CPC classification number: H01L29/4232 , H01L21/02126 , H01L21/02164 , H01L21/02167 , H01L21/0217 , H01L21/022 , H01L21/02244 , H01L21/02274 , H01L21/0228 , H01L21/31111 , H01L29/0649 , H01L29/401 , H01L29/66545 , H01L29/78
Abstract: Semiconductor device structures and methods for forming the same are provided. A method for forming a semiconductor device structure includes forming a gate structure over a semiconductor substrate. The method also includes forming spacer elements adjoining sidewalls of the gate structure. The method further includes forming a protection material layer over the gate structure. The formation of the protection material layer includes a substantial non-plasma process. In addition, the method includes depositing a dielectric material layer over the protection material layer. The deposition of the dielectric material layer includes a plasma-involved process.
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