公开(公告)号：US20240322044A1

公开(公告)日：2024-09-26

申请号：US18734635

申请日：2024-06-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Cheng Chiang ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC: H01L29/78 ,  B82Y10/00 ,  H01L29/06 ,  H01L29/165 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/7856 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78696 ,  H01L29/165 ,  H01L2029/7858

Abstract: A device includes a first semiconductor strip, a first gate dielectric encircling the first semiconductor strip, a second semiconductor strip overlapping the first semiconductor strip, and a second gate dielectric encircling the second semiconductor strip. The first gate dielectric contacts the first gate dielectric. A gate electrode has a portion over the second semiconductor strip, and additional portions on opposite sides of the first and the second semiconductor strips and the first and the second gate dielectrics.

公开(公告)号：US11855155B2

公开(公告)日：2023-12-26

申请号：US17658779

申请日：2022-04-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Xusheng Wu ,  Chang-Miao Liu ,  Ying-Keung Leung ,  Huiling Shang ,  Youbo Lin

IPC: H01L29/40 ,  H01L21/768 ,  H01L21/283 ,  H01L29/45 ,  H01L21/285 ,  H01L29/66

CPC classification number: H01L29/401 ,  H01L21/283 ,  H01L21/28518 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L29/456 ,  H01L29/665

Abstract: A method including providing a device including a gate structure and a source/drain feature adjacent to the gate structure. An insulating layer (e.g., CESL, ILD) is formed over the source/drain feature. A trench is etched in the insulating layer to expose a surface of the source/drain feature. A semiconductor material is then formed in the etched trench on the surface of the source/drain feature. The semiconductor material is converted to a silicide.

公开(公告)号：US11784241B2

公开(公告)日：2023-10-10

申请号：US17842193

申请日：2022-06-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Cheng Chiang ,  Ching-Wei Tsai ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC: H01L23/00 ,  H01L29/66 ,  H01L29/165 ,  H01L29/08 ,  H01L21/02 ,  H01L21/283 ,  H01L29/78 ,  H01L21/768

CPC classification number: H01L29/66795 ,  H01L21/02271 ,  H01L21/283 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/785 ,  H01L29/7851 ,  H01L21/76834 ,  H01L21/76897

Abstract: Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.

公开(公告)号：US11594619B2

公开(公告)日：2023-02-28

申请号：US17120553

申请日：2020-12-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Cheng Chiang ,  Ching-Wei Tsai ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC: H01L29/66 ,  H01L29/165 ,  H01L29/08 ,  H01L21/02 ,  H01L21/283 ,  H01L29/78 ,  H01L21/768

Abstract: Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.

公开(公告)号：US20220310452A1

公开(公告)日：2022-09-29

申请号：US17213420

申请日：2021-03-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Xusheng Wu ,  Ying-Keung Leung ,  Huiling Shang

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/786 ,  H01L29/423 ,  H01L29/66 ,  H01L29/06

Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises first semiconductor stack over a substrate, wherein the first semiconductor stack includes first semiconductor layers separated from each other and stacked up along a direction substantially perpendicular to a top surface of the substrate; second semiconductor stack over the substrate, wherein the second semiconductor stack includes second semiconductor layers separated from each other and stacked up along the direction substantially perpendicular to the top surface of the substrate; inner spacers between edge portions of the first semiconductor layers and between edge portions of the second semiconductor layers; and a bulk source/drain (S/D) feature between the first semiconductor stack and the second semiconductor stack, wherein the bulk S/D feature is separated from the substrate by a first air gap, and the bulk S/D feature is separated from the inner spacers by second air gaps.

公开(公告)号：US11145762B2

公开(公告)日：2021-10-12

申请号：US16016748

申请日：2018-06-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Huan-Sheng Wei ,  Hung-Li Chiang ,  Chia-Wen Liu ,  Yi-Ming Sheu ,  Zhiqiang Wu ,  Chung-Cheng Wu ,  Ying-Keung Leung

IPC: H01L29/78 ,  H01L29/786 ,  H01L21/02 ,  H01L21/306 ,  H01L21/311 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/423 ,  H01L29/66

Abstract: A multi-gate semiconductor device having a fin element, a gate structure over the fin element, an epitaxial source/drain feature adjacent the fin element; a dielectric spacer interposing the gate structure and the epitaxial source/drain feature.

公开(公告)号：US11004934B2

公开(公告)日：2021-05-11

申请号：US16226088

申请日：2018-12-19

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ka-Hing Fung ,  Kuo-Cheng Ching ,  Ying-Keung Leung

IPC: H01L29/775 ,  H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  B82Y10/00 ,  H01L29/417 ,  H01L29/08

Abstract: A semiconductor device includes first channel layers disposed over a substrate, a first source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the first channel layers, a gate electrode layer disposed on the gate dielectric layer and wrapping each of the first channel layers, and a liner semiconductor layer disposed between the first channel layers and the first source/drain region.

公开(公告)号：US20210098609A1

公开(公告)日：2021-04-01

申请号：US17120553

申请日：2020-12-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuo-Cheng Chiang ,  Ching-Wei Tsai ,  Chi-Wen Liu ,  Ying-Keung Leung

IPC: H01L29/66 ,  H01L29/165 ,  H01L29/08 ,  H01L21/02 ,  H01L21/283 ,  H01L29/78

Abstract: Devices and structures that include a gate spacer having a gap or void are described along with methods of forming such devices and structures. In accordance with some embodiments, a structure includes a substrate, a gate stack over the substrate, a contact over the substrate, and a spacer disposed laterally between the gate stack and the contact. The spacer includes a first dielectric sidewall portion and a second dielectric sidewall portion. A void is disposed between the first dielectric sidewall portion and the second dielectric sidewall portion.

公开(公告)号：US10164012B2

公开(公告)日：2018-12-25

申请号：US15064402

申请日：2016-03-08

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ka-Hing Fung ,  Kuo-Cheng Ching ,  Ying-Keung Leung

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/306 ,  H01L21/02 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device includes first channel layers disposed over a substrate, a first source/drain region disposed over the substrate, a gate dielectric layer disposed on and wrapping each of the first channel layers, a gate electrode layer disposed on the gate dielectric layer and wrapping each of the first channel layers, and a liner semiconductor layer disposed between the first channel layers and the first source/drain region.

公开(公告)号：US20170338225A1

公开(公告)日：2017-11-23

申请号：US15226007

申请日：2016-08-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kuo-Cheng Ching ,  Shi-Ning Ju ,  Chih-Hao Wang ,  Ying-Keung Leung ,  Carlos H. Diaz

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06

CPC classification number: H01L27/0886 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/088 ,  H01L27/108 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor structure includes a substrate, at least one active fin present on the substrate, and at least one isolation dielectric surrounding the active fin. The isolation dielectric has at least one trench therein. The semiconductor structure further includes at least one dielectric liner present on at least one sidewall of the trench of the isolation dielectric, and at least one filling dielectric present in the trench of the isolation dielectric.