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公开(公告)号:US20230395689A1
公开(公告)日:2023-12-07
申请号:US18358742
申请日:2023-07-25
发明人: Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L29/49 , H01L21/02 , H01L21/3213 , H01L29/66 , H01L29/78 , H01L21/28 , H01L21/321
CPC分类号: H01L29/4958 , H01L21/02074 , H01L21/32135 , H01L21/32136 , H01L29/66795 , H01L29/785 , H01L21/28079 , H01L21/28088 , H01L21/3212 , H01L21/32133 , H01L29/4966 , H01L29/7851
摘要: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号:US10790394B2
公开(公告)日:2020-09-29
申请号:US16390975
申请日:2019-04-22
发明人: Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L21/8238 , H01L29/78 , H01L29/06 , H01L29/66
摘要: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.
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公开(公告)号:US20190252539A1
公开(公告)日:2019-08-15
申请号:US16390975
申请日:2019-04-22
发明人: Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
摘要: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.
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公开(公告)号:US20170256640A1
公开(公告)日:2017-09-07
申请号:US15601576
申请日:2017-05-22
发明人: Po-Chi Wu , Chai-wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
CPC分类号: H01L29/785 , H01L29/0653 , H01L29/66545 , H01L29/66795
摘要: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.
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公开(公告)号:US11764280B2
公开(公告)日:2023-09-19
申请号:US16923867
申请日:2020-07-08
发明人: Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L21/02 , H01L29/66 , H01L21/321 , H01L29/49 , H01L21/3213 , H01L29/78 , H01L21/28
CPC分类号: H01L29/4958 , H01L21/02074 , H01L21/28079 , H01L21/28088 , H01L21/3212 , H01L21/32133 , H01L21/32135 , H01L21/32136 , H01L29/4966 , H01L29/66795 , H01L29/785 , H01L29/7851
摘要: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号:US20200343357A1
公开(公告)日:2020-10-29
申请号:US16923867
申请日:2020-07-08
发明人: Po-Chi Wu , Chia-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L29/49 , H01L21/02 , H01L21/3213 , H01L29/66 , H01L29/78 , H01L21/28 , H01L21/321
摘要: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号:US10714587B2
公开(公告)日:2020-07-14
申请号:US16050687
申请日:2018-07-31
发明人: Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L29/66 , H01L29/78 , H01L29/49 , H01L21/02 , H01L21/3213 , H01L21/28 , H01L21/321
摘要: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号:US10269963B2
公开(公告)日:2019-04-23
申请号:US15601576
申请日:2017-05-22
发明人: Po-Chi Wu , Chai-wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L21/768 , H01L29/78 , H01L29/06 , H01L29/66
摘要: A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.
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公开(公告)号:US20180337246A1
公开(公告)日:2018-11-22
申请号:US16050687
申请日:2018-07-31
发明人: Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号: H01L29/49 , H01L29/78 , H01L21/3213 , H01L21/02 , H01L21/321 , H01L21/28
摘要: A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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