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公开(公告)号：US20190334016A1
公开(公告)日：2019-10-31
申请号：US16505917
申请日：2019-07-09
发明人： Po-Chi Wu , Chai-Wei Chang , Kuo-Hui Chang , Yi-Cheng Chao
摘要： Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a cap element over the gate stack. The cap element has an upper portion and a lower portion, and the upper portion is wider than the lower portion. The semiconductor device structure also includes a spacer element over a sidewall of the cap element and a sidewall of the gate stack.
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公开(公告)号：US11764280B2
公开(公告)日：2023-09-19
申请号：US16923867
申请日：2020-07-08
发明人： Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号： H01L21/02 , H01L29/66 , H01L21/321 , H01L29/49 , H01L21/3213 , H01L29/78 , H01L21/28
CPC分类号： H01L29/4958 , H01L21/02074 , H01L21/28079 , H01L21/28088 , H01L21/3212 , H01L21/32133 , H01L21/32135 , H01L21/32136 , H01L29/4966 , H01L29/66795 , H01L29/785 , H01L29/7851
摘要： A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号：US20200343357A1
公开(公告)日：2020-10-29
申请号：US16923867
申请日：2020-07-08
发明人： Po-Chi Wu , Chia-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号： H01L29/49 , H01L21/02 , H01L21/3213 , H01L29/66 , H01L29/78 , H01L21/28 , H01L21/321
摘要： A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号：US10468407B2
公开(公告)日：2019-11-05
申请号：US15445664
申请日：2017-02-28
发明人： Chai-Wei Chang , Che-Cheng Chang , Po-Chi Wu , Yi-Cheng Chao
IPC分类号： H01L27/088 , H01L29/06 , H01L29/49 , H01L27/02 , H01L21/8234 , H01L29/66 , H01L21/762 , H01L29/423 , H01L21/3213
摘要： A FinFET device structure is provided. The FinFET device structure includes an isolation structure formed over a substrate and a fin structure formed over the substrate. The FinFET device structure includes a first gate structure and a second gate structure formed over the fin structure, and the first gate structure has a first width in a direction parallel to the fin structure, the second gate structure has a second width in a direction parallel to the fin structure, and the first width is smaller than the second width. The first gate structure includes a first work function layer having a first height. The second gate structure includes a second work function layer having a second height and a gap between the first height and the second height is in a range from about 1 nm to about 6 nm.
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公开(公告)号：US20190305113A1
公开(公告)日：2019-10-03
申请号：US16417780
申请日：2019-05-21
发明人： Po-Chi Wu , Chai-Wei Chang , Kuo-Hui Chang , Yi-Cheng Chao
摘要： Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a cap element over the gate stack. The cap element has an upper portion and a lower portion, and the upper portion is wider than the lower portion. The semiconductor device structure also includes a spacer element over a sidewall of the cap element and a sidewall of the gate stack.
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公开(公告)号：US11133400B2
公开(公告)日：2021-09-28
申请号：US16417780
申请日：2019-05-21
发明人： Po-Chi Wu , Chai-Wei Chang , Kuo-Hui Chang , Yi-Cheng Chao
IPC分类号： H01L21/8234 , H01L29/66 , H01L29/78 , H01L29/49
摘要： Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a cap element over the gate stack. The cap element has an upper portion and a lower portion, and the upper portion is wider than the lower portion. The semiconductor device structure also includes a spacer element over a sidewall of the cap element and a sidewall of the gate stack.
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公开(公告)号：US10714587B2
公开(公告)日：2020-07-14
申请号：US16050687
申请日：2018-07-31
发明人： Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号： H01L29/66 , H01L29/78 , H01L29/49 , H01L21/02 , H01L21/3213 , H01L21/28 , H01L21/321
摘要： A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号：US10269963B2
公开(公告)日：2019-04-23
申请号：US15601576
申请日：2017-05-22
发明人： Po-Chi Wu , Chai-wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号： H01L21/768 , H01L29/78 , H01L29/06 , H01L29/66
摘要： A method for forming a semiconductor device structure is provided. The method includes forming a dielectric layer over a substrate. The dielectric layer has a trench passing through the dielectric layer. The method includes forming a gate stack in the trench. The method includes performing a hydrogen-containing plasma process over the gate stack. The method includes removing a top portion of the gate stack to form a first recess surrounded by the gate stack and the dielectric layer. The method includes forming a cap layer in the first recess to fill the first recess.
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公开(公告)号：US20180337246A1
公开(公告)日：2018-11-22
申请号：US16050687
申请日：2018-07-31
发明人： Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号： H01L29/49 , H01L29/78 , H01L21/3213 , H01L21/02 , H01L21/321 , H01L21/28
摘要： A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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公开(公告)号：US20230395689A1
公开(公告)日：2023-12-07
申请号：US18358742
申请日：2023-07-25
发明人： Po-Chi Wu , Chai-Wei Chang , Jung-Jui Li , Ya-Lan Chang , Yi-Cheng Chao
IPC分类号： H01L29/49 , H01L21/02 , H01L21/3213 , H01L29/66 , H01L29/78 , H01L21/28 , H01L21/321
CPC分类号： H01L29/4958 , H01L21/02074 , H01L21/32135 , H01L21/32136 , H01L29/66795 , H01L29/785 , H01L21/28079 , H01L21/28088 , H01L21/3212 , H01L21/32133 , H01L29/4966 , H01L29/7851
摘要： A method for fabricating a semiconductor component includes forming an interlayer dielectric (ILD) layer on a substrate, forming a trench in the interlayer dielectric layer, forming a metal gate in the trench, removing a portion of the metal gate protruding from the ILD layer, reacting a reducing gas with the metal gate, and removing a top portion of the metal gate.
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