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公开(公告)号:US20240128231A1
公开(公告)日:2024-04-18
申请号:US18149935
申请日:2023-01-04
发明人: Fu Wei Liu , Pei-Wei Lee , Yun-Chung Wu , Bo-Yu Chiu , Szu-Hsien Lee , Mirng-Ji Lii
CPC分类号: H01L24/83 , H01L24/29 , H01L25/00 , H01L29/02 , H01L2224/29186 , H01L2224/83896
摘要: Semiconductor devices and methods of manufacturing the semiconductor devices are presented. In embodiments the methods of manufacturing include depositing a first bonding layer on a first substrate, wherein the first substrate comprises a semiconductor substrate and a metallization layer. The first bonding layer and the semiconductor substrate are patterned to form first openings. A second substrate is bonded to the first substrate. After the bonding the second substrate, the second substrate is patterned to form second openings, at least one of the second openings exposing at least one of the first openings. After the patterning the second substrate, a third substrate is bonded to the second substrate, and after the bonding the third substrate, the third substrate is patterned to form third openings, at least one of the third openings exposing at least one of the second openings.
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公开(公告)号:US20240124298A1
公开(公告)日:2024-04-18
申请号:US18152511
申请日:2023-01-10
发明人: Yun-Chung Wu , Jhao-Yi Wang , Hao Chun Yang , Pei-Wei Lee , Wen-Hsiung Lu
CPC分类号: B81C1/00095 , B81B7/0006 , B81B2207/07
摘要: Microelectromechanical devices and methods of manufacture are presented. Embodiments include bonding a mask substrate to a first microelectromechanical system (MEMS) device. After the bonding has been performed, the mask substrate is patterned. A first conductive pillar is formed within the mask substrate, and a second conductive pillar is formed within the mask substrate, the second conductive pillar having a different height from the first conductive pillar. The mask substrate is then removed.
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公开(公告)号:US20240034619A1
公开(公告)日:2024-02-01
申请号:US18151689
申请日:2023-01-09
发明人: Pei-Wei Lee , Fu Wei Liu , Szu-Hsien Lee , Yun-Chung Wu , Chin-Yu Ku , Ming-Da Cheng , Ming -Ji Lii
CPC分类号: B81B7/007 , B81C1/00301 , B81B2207/097
摘要: A method includes forming an interconnect structure over a semiconductor substrate. The interconnect structure includes a plurality of dielectric layers, and the interconnect structure and the semiconductor substrate are in a wafer. A plurality of metal pads are formed over the interconnect structure. A plurality of through-holes are formed to penetrate through the wafer. The plurality of through-holes include top portions penetrating through the interconnect structure, and middle portions underlying and joining to the top portions. The middle portions are wider than respective ones of the top portions. A metal layer is formed to electrically connect to the plurality of metal pads. The metal layer extends into the top portions of the plurality of through-holes.
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