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公开(公告)号：US20130027083A1
公开(公告)日：2013-01-31
申请号：US13562144
申请日：2012-07-30
IPC分类号： H01L25/00
CPC分类号： H01L27/0207 , H01L27/11807 , H01L2027/11822
摘要： A semiconductor integrated circuit device includes cells A-1, B-1, and C-1 that have the same logic. Cell B-1 has cell width W2 larger than a cell width of cell A-1, but gate length L1 of a MOS transistor is equal to that of cell A-1. Cell C-1 has cell width W2 equal to a cell width of cell B-1, but has a MOS transistor having large gate length L2. A circuit delay of cell C-1 becomes large as compared with that of cells A-1 and B-1, but leak current becomes small. Therefore, by replacing cell A-1 adjacent to a space area with cell B-1, and by replacing cell B-1 in a path having room in timing with cell C-1, for example, leak current can be suppressed without increasing a chip area.
摘要翻译： 半导体集成电路器件包括具有相同逻辑的单元A-1，B-1和C-1。 单元B-1具有大于单元A-1的单元宽度的单元宽度W2，但是MOS晶体管的栅极长度L1等于单元A-1的单元宽度。 单元C-1具有等于单元B-1的单元宽度的单元宽度W2，但是具有栅极长度L2大的MOS晶体管。 与电池A-1和B-1相比，电池C-1的电路延迟变大，但泄漏电流变小。 因此，通过用小区B-1替换与空间区域相邻的小区A-1，并且例如通过用小区C-1定时的具有空间的路径替换小区B-1，可以抑制泄漏电流而不增加 芯片面积。
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2.发明授权Semiconductor integrated circuit device having a plurality of standard cells for leakage current suppression 有权具有用于泄漏电流抑制的多个标准单元的半导体集成电路器件公开(公告)号：US08525552B2
公开(公告)日：2013-09-03
申请号：US13562144
申请日：2012-07-30
IPC分类号： H01L25/00 , H01L21/82 , H03K19/00 , H03K19/094
CPC分类号： H01L27/0207 , H01L27/11807 , H01L2027/11822
摘要： A semiconductor integrated circuit device includes cells A-1, B-1, and C-1 that have the same logic. Cell B-1 has cell width W2 larger than a cell width of cell A-1, but gate length L1 of a MOS transistor is equal to that of cell A-1. Cell C-1 has cell width W2 equal to a cell width of cell B-1, but has a MOS transistor having large gate length L2. A circuit delay of cell C-1 becomes large as compared with that of cells A-1 and B-1, but leak current becomes small. Therefore, by replacing cell A-1 adjacent to a space area with cell B-1, and by replacing cell B-1 in a path having room in timing with cell C-1, for example, leak current can be suppressed without increasing a chip area.
摘要翻译： 半导体集成电路器件包括具有相同逻辑的单元A-1，B-1和C-1。 单元B-1具有大于单元A-1的单元宽度的单元宽度W2，但是MOS晶体管的栅极长度L1等于单元A-1的单元宽度。 单元C-1具有等于单元B-1的单元宽度的单元宽度W2，但是具有栅极长度L2大的MOS晶体管。 与电池A-1和B-1相比，电池C-1的电路延迟变大，但泄漏电流变小。 因此，通过用小区B-1替换与空间区域相邻的小区A-1，并且例如通过用小区C-1定时的具有空间的路径替换小区B-1，可以抑制泄漏电流而不增加 芯片面积。
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公开(公告)号：US07369618B2
公开(公告)日：2008-05-06
申请号：US11132206
申请日：2005-05-19
IPC分类号： H04B3/00
CPC分类号： H04L25/028 , H04L25/0292 , H04L25/03878
摘要： A signal is transmitted in synchronization with a clock signal that repeats H and L levels indicating a preparation period and a transmission period, respectively. A transmitting circuit includes a transmitting capacitor, an input switch for setting a voltage in accordance with an input digital signal in the transmitting capacitor at preparation period, and a transmitting switch for generating a small voltage change in the signal line at transmission period, the voltage change being in accordance with a voltage of the transmitting capacitor. A receiving circuit includes an inverter with a CMOS configuration, a receiving capacitor inserted between an input terminal and an output terminal of the inverter, an equalizing switch for short-circuiting the input terminal and the output terminal of the inverter so as to set the voltage of the signal line to a predetermined voltage at preparation period, and a latch for supplying an output digital signal by performing logic amplification of the voltage of the output terminal of the inverter for each transmission period, and for holding the output for each preparation period.
摘要翻译： 与重复分别表示准备期间和发送期间的H，L电平的时钟信号同步地发送信号。 发送电路包括发送电容器，用于在准备期间根据发送电容器中的输入数字信号设定电压的输入开关和用于在发送期间产生信号线中的小电压变化的发送开关， 根据发送电容器的电压进行变化。 接收电路包括具有CMOS配置的反相器，插入在反相器的输入端子和输出端子之间的接收电容器，用于使逆变器的输入端子和输出端子短路的均衡开关，以便设置电压 的信号线在预备期间达到预定电压，以及锁存器，用于通过在每个传输周期内执行对逆变器的输出端子的电压的逻辑放大来提供输出数字信号，并且用于保持每个准备周期的输出。
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公开(公告)号：US20050207504A1
公开(公告)日：2005-09-22
申请号：US11132206
申请日：2005-05-19
IPC分类号： H03K19/096 , H03K17/04 , H03K19/0175 , H04L25/02 , H04L25/03 , H04L25/00
CPC分类号： H04L25/028 , H04L25/0292 , H04L25/03878
摘要： A signal is transmitted in synchronization with a clock signal that repeats H and L levels indicating a preparation period and a transmission period, respectively. A transmitting circuit includes a transmitting capacitor, an input switch for setting a voltage in accordance with an input digital signal in the transmitting capacitor at preparation period, and a transmitting switch for generating a small voltage change in the signal line at transmission period, the voltage change being in accordance with a voltage of the transmitting capacitor. A receiving circuit includes an inverter with a CMOS configuration, a receiving capacitor inserted between an input terminal and an output terminal of the inverter, an equalizing switch for short-circuiting the input terminal and the output terminal of the inverter so as to set the voltage of the signal line to a predetermined voltage at preparation period, and a latch for supplying an output digital signal by performing logic amplification of the voltage of the output terminal of the inverter for each transmission period, and for holding the output for each preparation period.
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公开(公告)号：US06922443B1
公开(公告)日：2005-07-26
申请号：US09712247
申请日：2000-11-15
IPC分类号： H03K19/096 , H03K17/04 , H03K19/0175 , H04L25/02 , H04L25/03 , H04B3/00
CPC分类号： H04L25/028 , H04L25/0292 , H04L25/03878
摘要： A signal is transmitted in synchronization with a clock signal that repeats H and L levels indicating a preparation period and a transmission period, respectively. A transmitting circuit includes a transmitting capacitor, an input switch for setting a voltage in accordance with an input digital signal in the transmitting capacitor at preparation period, and a transmitting switch for generating a small voltage change in the signal line at transmission period, the voltage change being in accordance with a voltage of the transmitting capacitor. A receiving circuit includes an inverter with a CMOS configuration, a receiving capacitor inserted between an input terminal and an output terminal of the inverter, an equalizing switch for short-circuiting the input terminal and the output terminal of the inverter so as to set the voltage of the signal line to a predetermined voltage at preparation period, and a latch for supplying an output digital signal by performing logic amplification of the voltage of the output terminal of the inverter for each transmission period, and for holding the output for each preparation period.
摘要翻译： 与重复分别表示准备期间和发送期间的H，L电平的时钟信号同步地发送信号。 发送电路包括发送电容器，用于在准备期间根据发送电容器中的输入数字信号设定电压的输入开关和用于在发送期间产生信号线中的小电压变化的发送开关， 根据发送电容器的电压进行变化。 接收电路包括具有CMOS配置的反相器，插入在反相器的输入端子和输出端子之间的接收电容器，用于使逆变器的输入端子和输出端子短路的均衡开关，以便设置电压 的信号线在预备期间达到预定电压，以及锁存器，用于通过在每个传输周期内执行对逆变器的输出端子的电压的逻辑放大来提供输出数字信号，并且用于保持每个准备周期的输出。
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公开(公告)号：US07659801B2
公开(公告)日：2010-02-09
申请号：US11452295
申请日：2006-06-14
IPC分类号： H01H67/02
CPC分类号： F02N11/087 , F02D2041/2048 , F02N11/0851 , F02N11/10 , F02N15/067 , F02N15/10 , F02N2011/0892
摘要： A starter includes a starter motor, a main circuit section, a main switch section including a main contact section to cut a current, a main plunger driven to open and close the main contact section, suction and holding coils, battery and motor terminals, and a switch terminal connected to the battery through a start switch, and opening and closing the main contact section in accordance with movement of the main plunger, a suction circuit section connected in parallel with the main circuit section and connected in series with the suction coil, a holding circuit section connected in series with the holding coil, and a breaking section connected in series with the suction coil inside the suction circuit section. The breaking section cuts electricity conduction when electricity is continuously conducted to the suction coil to bring about layer short circuit and a short circuit current flows at the suction circuit section.
摘要翻译： 起动器包括起动电动机，主电路部分，主开关部分，其包括用于切断电流的主接触部分，被驱动以打开和关闭主接触部分的主柱塞，吸入保持线圈，电池和电动机端子，以及 开关端子，其通过启动开关与电池连接，并且根据主柱塞的移动来打开和关闭主接触部分;吸入电路部分，与主电路部分并联连接并与吸入线圈串联; 与保持线圈串联连接的保持电路部分，以及与抽吸回路部分内的吸入线圈串联连接的断开部。 断电部分在连续传导到吸入线圈上时导致电力传导，从而导致层短路，并且在吸入回路部分流动短路电流。
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公开(公告)号：US07414327B2
公开(公告)日：2008-08-19
申请号：US11447850
申请日：2006-06-07
IPC分类号： H02K11/00
CPC分类号： H01H85/044 , F02N11/10 , H01H85/0241
摘要： Provided is a starter which reliably cuts off any abnormal current caused to flow through the motor and which can reduce the possibility of current cutoff in the case of normal supply current. According to the present invention, a starter includes: a motor having a field coil; and an electromagnetic switch for supplying an electric current from a battery to the motor to start an engine through a pinion gear, in which: a metal conductor is connected to an upstream side of the field coil to which the electric current is supplied; and the metal conductor has a narrowed portion endowed with a fuse function and having a small sectional area.
摘要翻译： 提供了可靠地切断通过电动机流过的任何异常电流并且在正常供电电流的情况下可以降低电流截止的可能性的起动器。 根据本发明，起动器包括：具有励磁线圈的马达; 以及电磁开关，用于将来自电池的电流供给到所述电动机，以通过小齿轮起动发动机，其中：金属导体连接到所述励磁线圈的供给电流的上游侧; 并且金属导体具有具有保险丝功能并且具有小截面积的变窄部分。
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公开(公告)号：US20070200354A1
公开(公告)日：2007-08-30
申请号：US11447850
申请日：2006-06-07
CPC分类号： H01H85/044 , F02N11/10 , H01H85/0241
摘要： Provided is a starter which reliably cuts off any abnormal current caused to flow through the motor and which can reduce the possibility of current cutoff in the case of normal supply current. According to the present invention, a starter includes: a motor having a field coil; and an electromagnetic switch for supplying an electric current from a battery to the motor to start an engine through a pinion gear, in which: a metal conductor is connected to an upstream side of the field coil to which the electric current is supplied; and the metal conductor has a narrowed portion endowed with a fuse function and having a small sectional area.
摘要翻译： 提供了可靠地切断通过电动机流过的任何异常电流并且在正常供电电流的情况下可以降低电流截止的可能性的起动器。 根据本发明，起动器包括：具有励磁线圈的马达; 以及电磁开关，用于将来自电池的电流供给到所述电动机，以通过小齿轮起动发动机，其中：金属导体连接到所述励磁线圈的供给电流的上游侧; 并且金属导体具有具有保险丝功能并且具有小截面积的变窄部分。
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9.发明授权Semiconductor integrated circuit for holding an output signal of an output terminal in a non-operating state 有权用于将输出端子的输出信号保持在非运行状态的半导体集成电路公开(公告)号：US06727743B2
公开(公告)日：2004-04-27
申请号：US10193910
申请日：2002-07-15
IPC分类号： G05F110
CPC分类号： H03K19/0016 , G05F1/56
摘要： In a static circuit or the like, upper and lower terminals are both set to a first power supply potential Vdd1 in the operating state of an inverter circuit. In the non-operating state, the power supply potential of the upper terminal is reduced to a second power supply potential Vdd2 (
摘要翻译： 在静态电路等中，在逆变器电路的运行状态下，上端子和下端子都被设置为第一电源电位Vdd1。 在非工作状态下，上端子的电源电位降至第二电源电位Vdd2（<< VDD1）。 如果逆变器电路的输入信号具有电位Vdd2（H电平），则其工作状态下的输出信号必须保持在接地电位（L电平）。 这要求PMOS晶体管的电导Gp和NMOS晶体管的电导Gn满足关系：Gp
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公开(公告)号：US5828717A
公开(公告)日：1998-10-27
申请号：US624960
申请日：1996-03-27
申请人： Keiichi Kusumoto , Shiro Dosho , Yutaka Terada , Akira Matsuzawa
发明人： Keiichi Kusumoto , Shiro Dosho , Yutaka Terada , Akira Matsuzawa
IPC分类号： G01R29/027 , G01C21/00
CPC分类号： G01R29/0273
摘要： There is provided a time counting circuit for measuring a pulse spacing of a pulse signal with high accuracy and with low power consumption. An inverter ring composed of an odd number of inverters connected in a ring oscillates and one signal transition occurs after another as though seemingly circulating around the inverter ring. Holding circuits connected to respective output terminals of the inverters composing the inverter ring output, on the rising edge of a pulse signal to be measured, signals outputted from the inverters at the same time. The outputted signals are then converted by a signal converting circuit to numeric data. A counter circuit connected to the output terminal of one of the inverters composing the inverter ring counts the number of circulations of signal transition. A time-difference operating circuit corrects the numeric data outputted from the signal converting circuit based on the number of circulations of signal transition outputted from the counter circuit to provide time data, while calculating and outputting the pulse spacing of the pulse signal to be measured.
摘要翻译： 提供了一种用于以高精度和低功耗测量脉冲信号的脉冲间隔的时间计数电路。 由连接在环上的奇数个反相器组成的逆变器环振荡，并且一个信号转换发生在似乎在逆变器环周围似乎循环。 连接到构成逆变器环的逆变器的各个输出端子的保持电路在待测脉冲信号的上升沿同时输出从逆变器输出的信号。 然后，输出的信号由信号转换电路转换成数字数据。 连接到构成逆变器环的逆变器之一的输出端的计数器电路对信号转换的循环数进行计数。 时差操作电路根据从计数器电路输出的信号转换的循环数来校正从信号转换电路输出的数字数据，以提供时间数据，同时计算并输出要测量的脉冲信号的脉冲间隔。
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