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1.发明授权Semiconductor memory device having voltage down convertor reducing current consumption 有权具有降压转换器的半导体存储器件减少电流消耗公开(公告)号：US06262931B1
公开(公告)日：2001-07-17
申请号：US09539893
申请日：2000-03-31
IPC分类号： G11C800
摘要： A control circuit & mode register outputs a signal responsive to each command to a VDC control circuit. The VDC control circuit outputs a signal PWRUP changing the quantity of a through current Ic of a comparator stored in a VDC in response to the command. The VDC control circuit internally generates a signal of which pulse width corresponds to a prescribed delay time, in response to input of the command. Therefore, activation of each bank may not be monitored but current consumption can be reduced by preferably controlling a power supply current while minimizing the number of delay circuits and wires.
摘要翻译： 控制电路和模式寄存器将响应于每个命令的信号输出到VDC控制电路。 VDC控制电路响应于该命令输出改变存储在VDC中的比较器的直流电流Ic的信号PWRUP。 VDC控制电路根据命令的输入内部产生脉冲宽度对应于规定的延迟时间的信号。 因此，通过优选地控制电源电流同时最小化延迟电路和电线的数量，可以不监视每个组的激活，而可以减少电流消耗。
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2.发明授权Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor 失效能够稳定地产生内部高电压的内部高压发生电路及其电路元件公开(公告)号：US06201437B1
公开(公告)日：2001-03-13
申请号：US09166171
申请日：1998-10-05
IPC分类号： G05F110
摘要： In order to stably generate a high voltage of a prescribed level, a Vpp detection circuit which is activated in response to an activation signal for comparing the high voltage with a reference voltage is forcibly brought into an active state for a prescribed period under control of an initial control circuit.
摘要翻译： 为了稳定地产生规定电平的高电压，响应用于将高电压与基准电压进行比较的激活信号而被激活的Vpp检测电路在控制下被强制地进入活动状态 初始控制电路。
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3.发明授权Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor 失效能够稳定地产生内部高电压的内部高压发生电路及其电路元件公开(公告)号：US06492863B2
公开(公告)日：2002-12-10
申请号：US09759331
申请日：2001-01-16
IPC分类号： G05F110
摘要： In order to stably generate a high voltage of a prescribed level, a Vpp detection circuit which is activated in response to an activation signal for comparing the high voltage with a reference voltage is forcibly brought into an active state for a prescribed period under control of an initial control circuit.
摘要翻译： 为了稳定地产生规定电平的高电压，响应用于将高电压与基准电压进行比较的激活信号而被激活的Vpp检测电路在控制下被强制地进入活动状态 初始控制电路。
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4.发明授权Internal high voltage generation circuit capable of stably generating internal high voltage and circuit element therefor 失效能够稳定地产生内部高电压的内部高压发生电路及其电路元件公开(公告)号：US06753720B2
公开(公告)日：2004-06-22
申请号：US10302849
申请日：2002-11-25
IPC分类号： G05F110
摘要： In order to stably generate a high voltage of a prescribed level, a Vpp detection circuit which is activated in response to an activation signal for comparing the high voltage with a reference voltage is forcibly brought into an active state for a prescribed period under control of an initial control circuit.
摘要翻译： 为了稳定地产生规定电平的高电压，响应用于将高电压与基准电压进行比较的激活信号而被激活的Vpp检测电路在控制下被强制地进入活动状态 初始控制电路。
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公开(公告)号：US06297624B1
公开(公告)日：2001-10-02
申请号：US09258159
申请日：1999-02-26
IPC分类号： G05F316
CPC分类号： G05F1/465
摘要： An internal power supply circuit produces an internal power supply voltage from an external power supply voltage. A voltage level control circuit controls a voltage level and a temperature characteristic of the internal power supply voltage generated by the internal power supply circuit. The internal power supply circuit produces the internal power supply voltage having a negative or zero temperature characteristic in a low temperature region and a positive temperature characteristic in a high temperature region. The voltage level control circuit includes a structure optimizing a capacitance value of a sense power supply line stabilizing capacitance for driving a sense amplifier circuit, a level converting circuit determining the lowest operable region of the external power supply voltage of the internal power supply circuit, or a structure forcedly operating the internal voltage down converter upon power-on. The internal power supply voltage at a desired level is stably produced with a small occupied area and a low current consumption.
摘要翻译： 内部电源电路从外部电源电压产生内部电源电压。 电压电平控制电路控制由内部电源电路产生的内部电源电压的电压电平和温度特性。 内部电源电路在低温区域产生具有负温度或零温度特性的内部电源电压，在高温区域产生正温度特性。 电压电平控制电路包括优化用于驱动读出放大器电路的感测电源线稳定电容的电容值的结构，确定内部电源电路的外部电源电压的最低可操作区域的电平转换电路，或 一个在上电时强制运行内部降压转换器的结构。 以小的占用面积和低的电流消耗稳定地产生期望的内部电源电压。
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6.发明授权Semiconductor integrated circuit capable of rapidly rewriting data into memory cells 失效半导体集成电路能够将数据快速重写到存储单元中公开(公告)号：US06195298B1
公开(公告)日：2001-02-27
申请号：US09499734
申请日：2000-02-08
IPC分类号： G11C700
摘要： A semiconductor integrated circuit includes a node for the power supply voltage for array that is connected to a sense amplifier, a decoupling capacitance connected to the node for the power supply voltage for array, a voltage-down converter connected to the node for the power supply voltage for array and generating a largest voltage stored in a memory cell, and two voltage-down converters connected to the node for the power supply voltage for array and generating a voltage higher than the largest voltage, and boosts the voltage of the node for the power supply voltage for array to attain a voltage higher than the largest voltage in the stand-by state and activates the voltage-down converter generating the largest voltage in operation.
摘要翻译： 半导体集成电路包括用于连接到读出放大器的阵列的电源电压的节点，连接到用于阵列的电源电压的节点的去耦电容，连接到用于电源的节点的降压转换器 并且产生存储在存储单元中的最大电压，以及两个降压转换器，连接到节点，用于阵列的电源电压，并产生高于最大电压的电压，并将节点的电压升高为 用于阵列的电源电压以获得高于待机状态下的最大电压的电压，并激活在工作中产生最大电压的降压转换器。
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7.发明授权
公开(公告)号：US6091648A
公开(公告)日：2000-07-18
申请号：US145141
申请日：1998-09-01
IPC分类号： G11C11/413 , G05F1/56 , G11C5/14 , G11C7/06 , G11C11/407 , G11C11/409 , H01L21/8242 , H01L27/108 , G11C7/00
摘要： A semiconductor integrated circuit includes a node for the power supply voltage for array that is connected to a sense amplifier, a decoupling capacitance connected to the node for the power supply voltage for array, a voltage-down converter connected to the node for the power supply voltage for array and generating a largest voltage stored in a memory cell, and two voltage-down converters connected to the node for the power supply voltage for array and generating a voltage higher than the largest voltage, and boosts the voltage of the node for the power supply voltage for array to attain a voltage higher than the largest voltage in the stand-by state and activates the voltage-down converter generating the largest voltage in operation.
摘要翻译： 半导体集成电路包括用于连接到读出放大器的阵列的电源电压的节点，连接到用于阵列的电源电压的节点的去耦电容，连接到用于电源的节点的降压转换器 并且产生存储在存储单元中的最大电压，以及两个降压转换器，连接到节点，用于阵列的电源电压，并产生高于最大电压的电压，并将节点的电压升高为 用于阵列的电源电压以获得高于待机状态下的最大电压的电压，并激活在工作中产生最大电压的降压转换器。
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8.发明授权公开(公告)号：US06937088B2
公开(公告)日：2005-08-30
申请号：US10909419
申请日：2004-08-03
IPC分类号： G05F3/26 , G05F1/46 , G11C11/407 , H02M3/155 , H03F3/45 , H03K17/687 , H03K19/00 , G05F1/10
CPC分类号： G05F1/465
摘要： An internal power supply potential generating circuit includes: a control potential generating circuit having four MOS transistors connected in series between a node and a ground potential line, and controlling a pull-up transistor and a pull-down transistor in order that a potential at an output node coincides with a control potential; a monitor potential generating circuit having four MOS transistors connected in series between a prescribed node and a ground potential line, and generating a monitor potential; a potential dividing circuit generating a potential ½ times a reference potential; and a VCC1 generating circuit controlling a potential at the prescribed potential in order that the monitor potential becomes the reference potential. Therefore, an output potential can be controlled with correctness.
摘要翻译： 内部电源电位产生电路包括：控制电位发生电路，其具有串联连接在节点和接地电位线之间的四个MOS晶体管，以及控制上拉晶体管和下拉晶体管，以便在 输出节点与控制电位一致; 具有串联连接在规定节点和地电位线之间的四个MOS晶体管，并产生监视电位的监视电位发生电路; 产生电位为参考电位的1/2倍的电势分压电路; 以及VCC1发生电路，其控制规定电位的电位，以使监视电位成为基准电位。 因此，可以正确地控制输出电位。
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9.发明授权公开(公告)号：US06781443B2
公开(公告)日：2004-08-24
申请号：US10274890
申请日：2002-10-22
IPC分类号： G05F110
CPC分类号： G05F1/465
摘要： An internal power supply potential generating circuit includes: a control potential generating circuit having four MOS transistors connected in series between a node and a ground potential line, and controlling a pull-up transistor and a pull-down transistor in order that a potential at an output node coincides with a control potential; a monitor potential generating circuit having four MOS transistors connected in series between a prescribed node and a ground potential line, and generating a monitor potential; a potential dividing circuit generating a potential 1/2 times a reference potential; and a VCC1 generating circuit controlling a potential at the prescribed potential in order that the monitor potential becomes the reference potential. Therefore, an output potential can be controlled with correctness.
摘要翻译： 内部电源电位产生电路包括：控制电位发生电路，其具有串联连接在节点和接地电位线之间的四个MOS晶体管，以及控制上拉晶体管和下拉晶体管，以便在 输出节点与控制电位一致; 具有串联连接在规定节点和地电位线之间的四个MOS晶体管，并产生监视电位的监视电位发生电路; 产生电位为参考电位1/2倍的电位分压电路; 以及VCC1发生电路，其控制规定电位的电位，以使监视电位成为基准电位。 因此，可以正确地控制输出电位。
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10.发明申请公开(公告)号：US20050007190A1
公开(公告)日：2005-01-13
申请号：US10909419
申请日：2004-08-03
IPC分类号： G05F3/26 , G05F1/46 , G11C11/407 , H02M3/155 , H03F3/45 , H03K17/687 , H03K19/00 , G05F1/10
CPC分类号： G05F1/465
摘要： An internal power supply potential generating circuit includes: a control potential generating circuit having four MOS transistors connected in series between a node and a ground potential line, and controlling a pull-up transistor and a pull-down transistor in order that a potential at an output node coincides with a control potential; a monitor potential generating circuit having four MOS transistors connected in series between a prescribed node and a ground potential line, and generating a monitor potential; a potential dividing circuit generating a potential 1/2 times a reference potential; and a VCC1 generating circuit controlling a potential at the prescribed potential in order that the monitor potential becomes the reference potential. Therefore, an output potential can be controlled with correctness.
摘要翻译： 内部电源电位产生电路包括：控制电位发生电路，其具有串联连接在节点和接地电位线之间的四个MOS晶体管，以及控制上拉晶体管和下拉晶体管，以便在 输出节点与控制电位一致; 具有串联连接在规定节点和地电位线之间的四个MOS晶体管，并产生监视电位的监视电位发生电路; 产生电位为参考电位1/2倍的电位分压电路; 以及VCC1发生电路，其控制规定电位的电位，以使监视电位成为基准电位。 因此，可以正确地控制输出电位。
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