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45 条记录 (耗时 0.01 秒)

    Control device for snoop tag
    1.
    发明授权
    Control device for snoop tag 失效
    窥探标签控制装置

    公开(公告)号：US08499125B2

    公开(公告)日：2013-07-30

    申请号：US11790272

    申请日：2007-04-24

    申请人： Makoto Hataida ,  Toshikazu Ueki ,  Takaharu Ishizuka ,  Takashi Yamamoto ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    发明人： Makoto Hataida ,  Toshikazu Ueki ,  Takaharu Ishizuka ,  Takashi Yamamoto ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

    CPC分类号： G06F12/0822 ,  G06F12/123

    摘要： To prevent a decrease in performance of controlling a snoop tag. A queue is stored with REPLACE target WAY information and an index as an entry associated with a REPLACE request received from a processor, the index stored in the queue is compared with an index of a subsequent READ request, and, as a result of the comparison, a process based on the index-coincident READ request is executed with respect to the snoop tag corresponding to a content of a cache memory of the processor. Further, the REPLACE target WAY information of the READ request is replaced with the WAY information in the index-coincident entry within the queue.

    摘要翻译： 以防止控制snoop标签的性能下降。 存储REPLACE目标WAY信息和索引作为与从处理器接收到的REPLACE请求相关联的条目的队列，将存储在队列中的索引与后续READ请求的索引进行比较，并且作为比较的结果 相对于与处理器的高速缓冲存储器的内容相对应的窥探标签，执行基于索引一致的READ请求的处理。 此外，READ请求的REPLACE目标WAY信息被队列中符合条件的条目中的WAY信息所替代。

    Information processing device and error processing method
    5.
    发明授权
    Information processing device and error processing method 失效
    信息处理装置和误差处理方法

    公开(公告)号：US08078920B2

    公开(公告)日：2011-12-13

    申请号：US12554318

    申请日：2009-09-04

    申请人： Atsushi Morosawa ,  Takaharu Ishizuka ,  Toshikazu Ueki ,  Makoto Hataida ,  Yuka Hosokawa ,  Takeshi Owaki ,  Takashi Yamamoto ,  Daisuke Itou

    发明人： Atsushi Morosawa ,  Takaharu Ishizuka ,  Toshikazu Ueki ,  Makoto Hataida ,  Yuka Hosokawa ,  Takeshi Owaki ,  Takashi Yamamoto ,  Daisuke Itou

    IPC分类号： G06F11/00

    CPC分类号： G06F11/1658 ,  G06F11/1641 ,  G06F11/165 ,  G06F11/1687

    摘要： An information processing device having two processing units capable of operating in synchronization with each other, includes: a common unit capable of outputting an identical signal to the two processing units; detection units that are respectively provided for the processing units and each detects errors occurred in corresponding processing unit respectively; a comparison unit that compares outputs from the two processing units; and a control unit that controls signals from the processing units to the common unit, based on a detection result of the detection units and a comparison result of the comparison unit, and determines, if errors of an identical type are simultaneously detected by the detection units, that the errors are due to an error of the common unit.

    摘要翻译： 具有能够彼此同步操作的两个处理单元的信息处理装置包括：能够向两个处理单元输出相同信号的公共单元; 分别提供给处理单元的检测单元，并分别检测相应处理单元中发生的错误; 比较来自两个处理单元的输出的比较单元; 以及控制单元，其基于检测单元的检测结果和比较单元的比较结果来控制从处理单元到公共单元的信号，并且如果检测单元同时检测到相同类型的错误，则确定 ，错误是由于公共单元的错误。

    Multiprocessor system
    6.
    发明授权
    Multiprocessor system 有权
    多处理器系统

    公开(公告)号：US07694106B2

    公开(公告)日：2010-04-06

    申请号：US11785891

    申请日：2007-04-20

    申请人： Toshikazu Ueki ,  Takaharu Ishizuka ,  Makoto Hataida ,  Takashi Yamamoto ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    发明人： Toshikazu Ueki ,  Takaharu Ishizuka ,  Makoto Hataida ,  Takashi Yamamoto ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    IPC分类号： G06F9/00

    CPC分类号： G06F12/0813 ,  G06F12/1072

    摘要： A multiprocessor system includes a judging unit judging whether a read command inputted to a global address crossbar is a read command to a memory on an own system board, an executing unit speculatively executing, when the judging unit judges that the read command is a read command to the memory on the own system board, the read command before global access based on an address notified from the global address crossbar, a setting unit setting for queuing data read from the memory in a data queue provided on a CPU without queuing the data in a data queue provided on the memory, and an instructing unit instructing, based on notification from the global address crossbar, the data queue provided on the CPU to discard the data or transmit the data to the CPU.

    摘要翻译： 多处理器系统包括判断单元，判断单元判断输入到全局地址交叉开关的读取命令是否是对自身系统板上的存储器的读取命令，当判断单元判断读取命令是读取命令时，执行单元推测执行 基于从全局地址交叉开关通知的地址，在全局访问之前的读取命令，在CPU上提供的数据队列中从存储器读取数据的设置单元设置，而不排队数据 设置在存储器上的数据队列，以及指示单元，根据来自全局地址交叉开关的通知指示CPU上提供的数据队列，丢弃数据或将数据发送到CPU。

    Multiprocessor system
    7.
    发明申请
    Multiprocessor system 有权
    多处理器系统

    公开(公告)号：US20080046694A1

    公开(公告)日：2008-02-21

    申请号：US11785891

    申请日：2007-04-20

    申请人： Toshikazu Ueki ,  Takaharu Ishizuka ,  Makoto Hataida ,  Takashi Yamamoto ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    发明人： Toshikazu Ueki ,  Takaharu Ishizuka ,  Makoto Hataida ,  Takashi Yamamoto ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    IPC分类号： G06F9/30

    CPC分类号： G06F12/0813 ,  G06F12/1072

    摘要： A multiprocessor system includes a judging unit judging whether a read command inputted to a global address crossbar is a read command to a memory on an own system board, an executing unit speculatively executing, when the judging unit judges that the read command is a read command to the memory on the own system board, the read command before global access based on an address notified from the global address crossbar, a setting unit setting for queuing data read from the memory in a data queue provided on a CPU without queuing the data in a data queue provided on the memory, and an instructing unit instructing, based on notification from the global address crossbar, the data queue provided on the CPU to discard the data or transmit the data to the CPU.

    摘要翻译： 多处理器系统包括判断单元，判断单元判断输入到全局地址交叉开关的读取命令是否是对自身系统板上的存储器的读取命令，当判断单元判断读取命令是读取命令时，执行单元推测执行 基于从全局地址交叉开关通知的地址，在全局访问之前的读取命令，在CPU上提供的数据队列中从存储器读取数据的设置单元设置，而不排队数据 设置在存储器上的数据队列，以及指示单元，根据来自全局地址交叉开关的通知指示CPU上提供的数据队列，丢弃数据或将数据发送到CPU。

    Node device, control device, control method and control program
    8.
    发明授权
    Node device, control device, control method and control program 有权
    节点装置，控制装置，控制方法和控制程序

    公开(公告)号：US08065566B2

    公开(公告)日：2011-11-22

    申请号：US11785759

    申请日：2007-04-19

    申请人： Takashi Yamamoto ,  Takaharu Ishizuka ,  Toshikazu Ueki ,  Makoto Hataida ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    发明人： Takashi Yamamoto ,  Takaharu Ishizuka ,  Toshikazu Ueki ,  Makoto Hataida ,  Yuka Hosokawa ,  Takeshi Owaki ,  Daisuke Itou

    IPC分类号： G06F11/10

    CPC分类号： H04L1/004 ,  H04L1/0082 ,  H04L2001/0097

    摘要： A control device managing a plurality of nodes transmitting and receiving data containing an error correcting code, comprises means accepting, when any one of the nodes detects an uncorrectable error from the data containing the error correcting code, a signal transmitted by the node detecting the error, means judging from a record of the detection of a first node, when accepting the signal from a second node receiving data transmitted by the first node, whether or not the first node has detected the uncorrectable error from the data transmitted to the second node, and means stopping, when the first node has detected the uncorrectable error from the data transmitted to the second node, a process attributed to the acceptance of the signal from the second node.

    摘要翻译： 管理发送和接收包含纠错码的数据的多个节点的控制装置包括当任何一个节点从包含纠错码的数据中检测到不可校正的错误时，接收由检测到错误的节点发送的信号 从第一节点接收到的数据接收来自第二节点的信号，从第一节点的检测记录中判断第一节点是否从发送到第二节点的数据检测到不可校正的错误， 并且意味着当第一节点从发送到第二节点的数据中检测到不可校正的错误时，停止归因于来自第二节点的信号的接受的处理。