-
1.发明授权
公开(公告)号：US5274601A
公开(公告)日：1993-12-28
申请号：US972545
申请日：1992-11-06
申请人： Takayuki Kawahara , Yoshiki Kawajiri , Takesada Akiba , Masashi Horiguchi , Takao Watanabe , Goro Kitsukawa , Yasushi Kawase , Toshikazu Tachibana , Masakazu Aoki
发明人： Takayuki Kawahara , Yoshiki Kawajiri , Takesada Akiba , Masashi Horiguchi , Takao Watanabe , Goro Kitsukawa , Yasushi Kawase , Toshikazu Tachibana , Masakazu Aoki
CPC分类号： H03K19/0016 , G11C5/14 , G11C8/08
摘要： A device parameter of a switching transistor is set in such a way that a leakage current of the switching transistor making up a power source switch which is turned off in a stand-by state is smaller than the sum total of subthreshold currents of P-channel or N-channel MOS transistors in an off state of a plurality of CMOS circuits. Therefore, the currents which flow through the plurality of CMOS circuits in the stand-by state are not determined by the subthreshold current but are determined by a small leakage current of the switching transistor. As a result, even when the CMOS circuit is shrunken and the subthreshold current increases, it is possible to reduce the current consumption in the stand-by state.
摘要翻译： 开关晶体管的器件参数被设置为使得构成在待机状态下被截止的电源开关的开关晶体管的漏电流小于P沟道的亚阈值电流的总和 或多个CMOS电路处于断开状态的N沟道MOS晶体管。 因此，在待机状态下流过多个CMOS电路的电流不由亚阈值电流确定，而是由开关晶体管的小的漏电流确定。 结果，即使当CMOS电路收缩并且亚阈值电流增加时，也可以减少待机状态下的电流消耗。
-
公开(公告)号：US06934210B2
公开(公告)日：2005-08-23
申请号：US10190480
申请日：2002-07-09
IPC分类号： G11C11/407 , G11C5/14 , G11C11/401 , G11C11/403 , G11C11/406 , G11C11/4074 , G11C11/409 , G11C29/08 , G11C7/00 , G11C7/04
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
-
公开(公告)号：US07821862B2
公开(公告)日：2010-10-26
申请号：US11902877
申请日：2007-09-26
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
摘要翻译： 本发明提供了一种半导体存储器电路，其能够在配备有共享使用电源，地址信号和数据总线的多个芯片的系统中减少非操作时的电流消耗。 半导体存储器电路具有内部电路，其能够选择性地通过开关装置执行工作电压的供应和停止，并且包括存储器阵列。 在其中接收预定控制信号的输入电路通过开关装置控制供电和停止工作电压，以便在不进行存储器操作时减小直流电流和泄漏电流，由此可以实现低功耗。
-
公开(公告)号：US20060239103A1
公开(公告)日：2006-10-26
申请号：US11472252
申请日：2006-06-22
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
-
公开(公告)号：US07292496B2
公开(公告)日：2007-11-06
申请号：US11472252
申请日：2006-06-22
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
摘要翻译： 本发明提供了一种半导体存储器电路，其能够在配备有共享使用电源，地址信号和数据总线的多个芯片的系统中减少非操作时的电流消耗。 半导体存储器电路具有内部电路，其能够选择性地通过开关装置执行工作电压的供应和停止，并且包括存储器阵列。 在其中接收预定控制信号的输入电路通过开关装置控制供电和停止工作电压，以便在不进行存储器操作时减小直流电流和泄漏电流，由此可以实现低功耗。
-
公开(公告)号：US08223577B2
公开(公告)日：2012-07-17
申请号：US13067857
申请日：2011-06-30
IPC分类号： G11C8/00
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
摘要翻译： 本发明提供了一种半导体存储器电路，其能够在配备有共享使用电源，地址信号和数据总线的多个芯片的系统中减少非操作时的电流消耗。 半导体存储器电路具有内部电路，其能够选择性地通过开关装置执行工作电压的供应和停止，并且包括存储器阵列。 在其中接收预定控制信号的输入电路通过开关装置控制供电和停止工作电压，以便在不进行存储器操作时减小直流电流和泄漏电流，由此可以实现低功耗。
-
公开(公告)号：US20110261639A1
公开(公告)日：2011-10-27
申请号：US13067857
申请日：2011-06-30
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
-
公开(公告)号：US20080253215A1
公开(公告)日：2008-10-16
申请号：US11902877
申请日：2007-09-26
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
摘要翻译： 本发明提供了一种半导体存储器电路，其能够在配备有共享使用电源，地址信号和数据总线的多个芯片的系统中减少非操作时的电流消耗。 半导体存储器电路具有内部电路，其能够选择性地通过开关装置执行工作电压的供应和停止，并且包括存储器阵列。 在其中接收预定控制信号的输入电路通过开关装置控制供电和停止工作电压，以便在不进行存储器操作时减小直流电流和泄漏电流，由此可以实现低功耗。
-
公开(公告)号：US07995417B2
公开(公告)日：2011-08-09
申请号：US12923338
申请日：2010-09-15
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
-
公开(公告)号：US20110032777A1
公开(公告)日：2011-02-10
申请号：US12923338
申请日：2010-09-15
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C11/4074 , G11C2207/2227
摘要： The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power supply, address signals and a data bus. The semiconductor memory circuit has an internal circuit which is capable of selectively performing the supply and stop of an operating voltage via switch means and includes a memory array. An input circuit, which receives a predetermined control signal therein, controls the supply and stop of the operating voltage by the switch means to reduce a DC current and a leak current when no memory operation is done, whereby low power consumption can be realized.
摘要翻译： 本发明提供了一种半导体存储器电路，其能够在配备有共享使用电源，地址信号和数据总线的多个芯片的系统中减少非操作时的电流消耗。 半导体存储器电路具有内部电路，其能够选择性地通过开关装置执行工作电压的供应和停止，并且包括存储器阵列。 在其中接收预定控制信号的输入电路通过开关装置控制供电和停止工作电压，以便在不进行存储器操作时减小直流电流和泄漏电流，由此可以实现低功耗。
-
-
-
-
-
-
-
-
-
搜索结果
27 条记录 (耗时 0.045 秒)
