Method of manufacturing contact structure
    1.
    发明授权
    Method of manufacturing contact structure 失效
    制造接触结构的方法

    公开(公告)号:US06337268B1

    公开(公告)日:2002-01-08

    申请号:US09610701

    申请日:2000-07-05

    IPC分类号: H01L214763

    CPC分类号: H01L21/76801 H01L21/76804

    摘要: A contact structure is formed with no voids in an interlayer insulation film and good surface planarity. A first insulation film (21) formed of p-TEOS is deposited to cover a substrate (1) and wires (4) formed on the substrate (1). A second insulation film (22) which is coating glass is formed by SOG. The surface is etched back from the opposite side to the substrate (1); therefore, the second insulation film (22) is etched. The etching is stopped at the point where the surface (21a) of the first insulation film (21) on the wires (4) is exposed. This ensures good surface,planarity. A third insulation film (23) is stacked on top of the second insulation film (22), and portions of the third insulation film (23) above the wires (4) are isotropically etched to form openings (51). At this time, the isotropic etching does not extend over the second insulation film (22).

    摘要翻译: 在层间绝缘膜中形成没有空隙的接触结构和良好的表面平面度。 沉积由p-TEOS形成的第一绝缘膜(21)以覆盖基板(1)和形成在基板(1)上的布线(4)。 涂覆玻璃的第二绝缘膜(22)由SOG形成。 表面从衬底(1)的相对侧被回蚀刻; 因此,蚀刻第二绝缘膜(22)。 蚀刻停止在电线(4)上的第一绝缘膜(21)的表面(21a)露出的点处。 这确保了良好的表面,平坦度。 第三绝缘膜(23)层叠在第二绝缘膜(22)的顶部上,并且将各导线(4)上方的第三绝缘膜(23)的各部分各向同性地蚀刻以形成开口(51)。 此时,各向同性蚀刻不会延伸超过第二绝缘膜(22)。

    Method of manufacturing semiconductor device
    2.
    发明授权
    Method of manufacturing semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US06313005B1

    公开(公告)日:2001-11-06

    申请号:US09610428

    申请日:2000-07-05

    IPC分类号: H01L2120

    摘要: Provided is a method of manufacturing a semiconductor device having a capacitor above a semiconductor substrate, with which it is possible to reduce the number of steps and the cost of manufacture. Specifically, a polysilicon layer (12) in which impurity is diffused is deposited on the entire surface including the inside of a hole (8A). An etching process of the polysilicon layer (12) is performed to form a storage node electrode composed of the polysilicon layer (12) remaining on the bottom and side of a groove for metallization (15) and in the hole (8A). The storage node electrode is broadly divided into a storage node electrode body disposed on the bottom and side of the groove for metallization (15), and a plug part disposed in the hole (8A). The storage node electrode is electrically connected via the plug part to a diffused region (19) of a semiconductor substrate (1).

    摘要翻译: 提供一种制造半导体器件的方法,该半导体器件具有在半导体衬底上方的电容器,由此可以减少步骤数量和制造成本。 具体而言,在包括孔(8A)的内部的整个表面上沉积杂质扩散的多晶硅层(12)。 执行多晶硅层(12)的蚀刻工艺以形成由残留在金属化槽(15)的底部和侧面上的多晶硅层(12)和孔(8A)组成的存储节点电极。 存储节点电极大致分为设置在用于金属化的槽的底部和侧面上的存储节点电极体(15)和设置在孔(8A)中的插头部分。 存储节点电极经由插头部电连接到半导体衬底(1)的扩散区域(19)。

    Method of manufacturing a semiconductor device
    6.
    发明授权
    Method of manufacturing a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US06251741B1

    公开(公告)日:2001-06-26

    申请号:US09219786

    申请日:1998-12-23

    IPC分类号: H01L218242

    CPC分类号: H01L27/10852 H01L27/10817

    摘要: There is described the manufacture of a semiconductor device having a storage node or high-yield manufacture of a compact memory IC. The present invention provides a method of manufacturing a semiconductor device including a basic dielectric layer formation step for forming a basic dielectric layer from a first dielectric material, a stopper film formation step for forming on the basic dielectric layer an etch stopper film from a second dielectric material differing from the first dielectric film, a sacrificial dielectric layer formation step for forming on the etch stopper film a sacrificial dielectric layer from the first dielectric material, a space formation step for forming a storage node formation space by removal of a predetermined area from the sacrificial dielectric layer until the etch stopper film becomes exposed, a storage node formation step for forming in the storage node formation space a storage node from a capacitive material, and a sacrificial dielectric layer removal step for removing the sacrificial dielectric layer surrounding the storage node by means of an etching operation suitable for removal of the first dielectric material.

    摘要翻译: 描述了具有存储节点或紧凑型存储器IC的高产量制造的半导体器件的制造。 本发明提供一种制造半导体器件的方法,该半导体器件包括用于从第一介电材料形成基本电介质层的基本电介质层形成步骤,用于在基本电介质层上形成来自第二电介质的蚀刻停止膜的阻挡膜形成步骤 与第一介电膜不同的材料;牺牲介电层形成步骤,用于在蚀刻停止膜上形成来自第一介电材料的牺牲介电层;空间形成步骤,用于通过从第一电介质膜去除预定区域形成存储节点形成空间; 牺牲电介质层,直到蚀刻停止膜露出,存储节点形成步骤,用于在存储节点形成空间中形成存储节点与电容材料;以及牺牲介电层去除步骤,用于通过以下步骤去除存储节点周围的牺牲介电层: 蚀刻操作的手段适合于去除 l的第一介电材料。

    MOSFET with graded gate oxide layer
    7.
    发明授权
    MOSFET with graded gate oxide layer 失效
    具有梯度栅氧化层的MOSFET

    公开(公告)号:US06812536B2

    公开(公告)日:2004-11-02

    申请号:US10383753

    申请日:2003-03-10

    IPC分类号: H01L2976

    CPC分类号: H01L29/42368 H01L21/28247

    摘要: A smile oxide film, serving as a gate oxide film, is formed under a three-layer poly-metal gate consisting of a doped polysilicon layer, a tungsten layer, and a SiON layer. The smile oxide film has a first region located beneath an edge of the poly-metal gate and a second region located beneath a central portion of the poly-metal gate. A film thickness of the first region is larger than a film thickness of the second region. An anti-oxidizing film, having a small oxygen diffusion rate compared with the polysilicon layer, entirely covers the poly-metal gate without exposing.

    摘要翻译: 作为栅极氧化膜的微笑氧化膜形成在由掺杂多晶硅层,钨层和SiON层构成的三层多金属栅极的下方。 微笑氧化膜具有位于多金属栅极的边缘下方的第一区域和位于多金属栅极的中心部分下方的第二区域。 第一区域的膜厚度大于第二区域的膜厚度。 与多晶硅层相比具有小的氧扩散速率的抗氧化膜完全覆盖多金属栅极而不暴露。

    Method of fabricating a semiconductor device and the semiconductor device with a capacitor structure having increased capacitance
    8.
    发明授权
    Method of fabricating a semiconductor device and the semiconductor device with a capacitor structure having increased capacitance 失效
    制造半导体器件的方法和具有增加的电容的电容器结构的半导体器件

    公开(公告)号:US06512261B2

    公开(公告)日:2003-01-28

    申请号:US09855536

    申请日:2001-05-16

    申请人: Akinori Kinugasa

    发明人: Akinori Kinugasa

    IPC分类号: H01L27108

    摘要: A method of producing a semiconductor memory having a memory cell structure in which a storage node, which consists of a capacitor electrode film having a rugged surface formed inside holes of an interlayer insulating film that is deposited on a substrate, constitutes a capacitor together with a cell plate through a dielectric film. In a method of forming holes in the interlayer insulating film in the direction of its thickness, forming the capacitor electrode inside the holes and over the upper surface of the interlayer insulating film, removing the capacitor electrode film exposed to the upper surface of the interlayer insulating film, making the surface of the capacitor electrode film formed inside the holes a rugged surface, and forming a cell plate inside the holes and on the upper surface of the interlayer insulating film, the capacitor electrode film exposed to the upper surface of the interlayer insulating film is removed before the surface of the capacitor electrode film formed inside the holes is made to be a rugged surface.

    摘要翻译: 一种制造具有存储单元结构的半导体存储器的方法,其中存储节点由具有凹凸表面的电容器电极膜构成,该电容器电极膜形成在沉积在基板上的层间绝缘膜的孔内部的凹凸表面,与 电池板通过电介质膜。 在层间绝缘膜的厚度方向上形成空穴的方法中,在电容器电极内部形成电容器电极并且在层间绝缘膜的上表面上,去除暴露于层间绝缘膜的上表面的电容电极膜 使形成在孔内的电容器电极膜的表面成为凹凸的表面,并且在孔内部和层间绝缘膜的上表面上形成电池板,暴露于层间绝缘膜的上表面的电容器电极膜 在形成在孔内的电容器电极膜的表面被制成凹凸的表面之前去除膜。