公开(公告)号：US20150255374A1

公开(公告)日：2015-09-10

申请号：US14716791

申请日：2015-05-19

Applicant: Tessera Advanced Technologies, Inc.

Inventor： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC: H01L23/48 ,  H01L23/528 ,  H01L25/07 ,  H01L23/522

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.

Abstract translation: 在层叠多个半导体芯片的半导体装置中，不会降低生产率而提高性能。 半导体器件具有第一半导体衬底，其具有与第一表面相对的第一表面和第二表面，形成在第一表面上的第一绝缘膜，形成在第一绝缘膜中并部分延伸到第一半导体衬底中的第一孔， 在第二表面上形成的第二孔，完全填充第一孔的第一电极和在第二孔中共形形成的导电膜。 导电膜电连接到第一电极的底表面，并使第一半导体衬底中的第三孔断开。 第三孔构造成接收第二半导体衬底的第二电极。

公开(公告)号：US20160190102A1

公开(公告)日：2016-06-30

申请号：US15061444

申请日：2016-03-04

Applicant: Tessera Advanced Technologies, Inc.

Inventor： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC: H01L25/065 ,  H01L23/48

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.

公开(公告)号：US09076700B2

公开(公告)日：2015-07-07

申请号：US14464026

申请日：2014-08-20

Applicant: Tessera Advanced Technologies, Inc.

Inventor： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/683 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  H01L23/538

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.

Abstract translation: 在层叠多个半导体芯片的半导体装置中，不会降低生产率而提高性能。 半导体器件具有多个元件，层间绝缘膜，焊盘和与依次形成在硅基板的主表面上的焊盘电连接的凸块电极，并且具有形成在硅衬底的背面上的背面电极 硅基板并与凸块电极电连接。 凸块电极具有贯穿焊盘并朝向硅衬底侧突出的突出部分。 背面电极形成为从硅衬底的背面侧朝向主面侧到达突起电极的突出部，并覆盖未到达的背面电极孔部的内侧 垫，使得背面电极与凸块电极电连接。

公开(公告)号：US09691739B2

公开(公告)日：2017-06-27

申请号：US15061444

申请日：2016-03-04

Applicant: Tessera Advanced Technologies, Inc.

Inventor： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC: H01L21/00 ,  H01L25/065 ,  H01L21/683 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H01L25/00 ,  H01L23/538 ,  H01L23/522 ,  H01L23/528 ,  H01L25/07

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.

公开(公告)号：US09318418B2

公开(公告)日：2016-04-19

申请号：US14716791

申请日：2015-05-19

Applicant: Tessera Advanced Technologies, Inc.

Inventor： Michihiro Kawashita ,  Yasuhiro Yoshimura ,  Naotaka Tanaka ,  Takahiro Naito ,  Takashi Akazawa

IPC: H01L21/00 ,  H01L23/48 ,  H01L21/683 ,  H01L21/768 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/538 ,  H01L23/522 ,  H01L23/528 ,  H01L25/07

CPC classification number: H01L25/0657 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/5386 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/81 ,  H01L24/94 ,  H01L25/074 ,  H01L25/50 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/06181 ,  H01L2224/1147 ,  H01L2224/11472 ,  H01L2224/13009 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13021 ,  H01L2224/13022 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/16058 ,  H01L2224/16112 ,  H01L2224/16146 ,  H01L2224/274 ,  H01L2224/81136 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81801 ,  H01L2224/81898 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/1205 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/1451 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/35121 ,  H01L2924/00 ,  H01L2224/05552 ,  H01L2924/00012

Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.

Abstract translation: 在层叠多个半导体芯片的半导体装置中，不会降低生产率而提高性能。 半导体器件具有第一半导体衬底，其具有与第一表面相对的第一表面和第二表面，形成在第一表面上的第一绝缘膜，形成在第一绝缘膜中并部分延伸到第一半导体衬底中的第一孔， 在第二表面上形成的第二孔，完全填充第一孔的第一电极和在第二孔中共形形成的导电膜。 导电膜电连接到第一电极的底表面，并使第一半导体衬底中的第三孔断开。 第三孔构造成接收第二半导体衬底的第二电极。