-
公开(公告)号：US20240355781A1
公开(公告)日：2024-10-24
申请号：US18628469
申请日：2024-04-05
发明人： Yangyang SUN , Xuefeng ZHANG , Jun CHEN , Lily ZHAO
IPC分类号： H01L25/065 , H01L23/00 , H01L23/31 , H01L23/498
CPC分类号： H01L25/0657 , H01L23/3128 , H01L23/49816 , H01L24/05 , H01L24/13 , H01L2224/05009 , H01L2224/05025 , H01L2224/13009 , H01L2224/13025 , H01L2225/06513 , H01L2225/06562 , H01L2924/1306 , H01L2924/1434 , H01L2924/15311 , H01L2924/182
摘要： A device includes an integrated device. The integrated device includes a die that is at least partially encapsulated. The die includes a conductive pad. The device also includes a first passivation layer coupled to a first surface of the die. The device includes an offset interconnect extending along a surface of the first passivation layer and including a portion that extends through an opening in the first passivation layer to contact the conductive pad. The device includes a bump including a portion that extends through an opening in a second passivation layer to contact the offset interconnect. The bump is offset, in a direction along a surface of the second passive layer, from the conductive pad.
-
公开(公告)号：US20240347511A1
公开(公告)日：2024-10-17
申请号：US18751061
申请日：2024-06-21
IPC分类号： H01L25/065 , H01L21/768 , H01L23/00 , H01L23/367 , H01L23/48 , H01L25/00
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/3677 , H01L23/481 , H01L24/03 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L25/50 , H01L2224/0401 , H01L2224/05025 , H01L2224/05147 , H01L2224/06102 , H01L2224/06519 , H01L2224/13009 , H01L2224/13021 , H01L2224/13025 , H01L2224/1403 , H01L2224/141 , H01L2224/16145 , H01L2224/16146 , H01L2224/17519 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/01022 , H01L2924/01074 , H01L2924/07025 , H01L2924/10253
摘要： Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the stack. In one embodiment, the thermal pads may be in direct contact with the semiconductor dies. Heat dissipation of the semiconductor die stack can be improved by a relatively high thermal conductivity of the thermal pads that directly contact the adjacent silicon dies in the stack without the intervening layers of the low thermal conductivity materials (e.g., passivation materials). In some embodiments, the manufacturing yield of the stack can be improved by having generally coplanar top surfaces of the thermal pads and under-bump metallization (UBM) structures.
-
公开(公告)号：US20240332235A1
公开(公告)日：2024-10-03
申请号：US18741188
申请日：2024-06-12
发明人： Hui-Min HUANG , Ming-Da CHENG , Wei-Hung LIN , Chang-Jung HSUEH , Kai-Jun ZHAN , Yung-Sheng LIN
IPC分类号： H01L23/00
CPC分类号： H01L24/13 , H01L24/11 , H01L24/16 , H01L2224/13006 , H01L2224/13009 , H01L2224/13018 , H01L2224/16227
摘要： A chip structure is provided. The chip structure includes a substrate. The chip structure includes a first conductive line over the substrate. The chip structure includes an insulating layer over the substrate and the first conductive line. The chip structure includes a conductive pillar over the insulating layer. The chip structure includes a solder bump on the conductive pillar. The solder bump is in direct contact with the conductive pillar.
-
公开(公告)号：US12033980B2
公开(公告)日：2024-07-09
申请号：US16871443
申请日：2020-05-11
IPC分类号： H01L25/065 , H01L21/768 , H01L23/00 , H01L23/367 , H01L23/48 , H01L25/00
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/3677 , H01L23/481 , H01L24/03 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L25/50 , H01L2224/0401 , H01L2224/05025 , H01L2224/05147 , H01L2224/06102 , H01L2224/06519 , H01L2224/13009 , H01L2224/13021 , H01L2224/13025 , H01L2224/1403 , H01L2224/141 , H01L2224/16145 , H01L2224/16146 , H01L2224/17519 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/01022 , H01L2924/01074 , H01L2924/07025 , H01L2924/10253 , H01L2224/141 , H01L2924/00012
摘要： Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the stack. In one embodiment, the thermal pads may be in direct contact with the semiconductor dies. Heat dissipation of the semiconductor die stack can be improved by a relatively high thermal conductivity of the thermal pads that directly contact the adjacent silicon dies in the stack without the intervening layers of the low thermal conductivity materials (e.g., passivation materials). In some embodiments, the manufacturing yield of the stack can be improved by having generally coplanar top surfaces of the thermal pads and under-bump metallization (UBM) structures.
-
公开(公告)号：US20190206842A1
公开(公告)日：2019-07-04
申请号：US16295380
申请日：2019-03-07
发明人： Ryohei Kitada , Masahiro Yamaguchi
IPC分类号： H01L25/065 , H01L23/498 , H01L23/29 , H01L23/31 , H01L23/48 , H01L23/522 , H01L23/00 , H01L21/768 , H01L25/00
CPC分类号： H01L25/0657 , H01L21/6835 , H01L21/6836 , H01L21/76898 , H01L23/291 , H01L23/293 , H01L23/3128 , H01L23/3135 , H01L23/3171 , H01L23/3192 , H01L23/481 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L23/5226 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L25/50 , H01L2221/68327 , H01L2221/6834 , H01L2221/68359 , H01L2224/0401 , H01L2224/05027 , H01L2224/05166 , H01L2224/05572 , H01L2224/05582 , H01L2224/05647 , H01L2224/11002 , H01L2224/1134 , H01L2224/13009 , H01L2224/13021 , H01L2224/13022 , H01L2224/13083 , H01L2224/13111 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/14181 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16238 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06565 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/014 , H01L2924/15311 , H01L2924/181 , H01L2924/3511 , H01L2924/00 , H01L2924/00014
摘要： In the semiconductor device, a semiconductor substrate has first and second surfaces. A circuitry layer is formed over the first surface and a first insulating layer is further formed over the circuitry layer. A second insulating layer including a first insulating element is formed over the second surface. A third insulating layer including a second insulating element different from the first insulating element of the second insulating layer is formed over the second surface with an intervention of the second insulating layer therebetween. A penetration electrode penetrates through the semiconductor substrate, the circuitry layer, the first insulating layer, the second insulating layer and the third insulating layer.
-
公开(公告)号：US20180331057A1
公开(公告)日：2018-11-15
申请号：US15590547
申请日：2017-05-09
发明人： David W. Abraham , John M. Cotte
IPC分类号： H01L23/00 , H01L23/522
CPC分类号： H01L24/11 , H01L21/76898 , H01L23/5226 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/14 , H01L24/24 , H01L24/25 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/82 , H01L24/83 , H01L24/92 , H01L27/18 , H01L39/00 , H01L2224/0345 , H01L2224/0347 , H01L2224/05022 , H01L2224/05124 , H01L2224/05558 , H01L2224/05572 , H01L2224/056 , H01L2224/11005 , H01L2224/1131 , H01L2224/1147 , H01L2224/11849 , H01L2224/13009 , H01L2224/13022 , H01L2224/131 , H01L2224/24011 , H01L2224/24051 , H01L2224/24105 , H01L2224/24146 , H01L2224/25175 , H01L2224/275 , H01L2224/29023 , H01L2224/29124 , H01L2224/32145 , H01L2224/32221 , H01L2224/73209 , H01L2224/73217 , H01L2224/73253 , H01L2224/82031 , H01L2224/82101 , H01L2224/83193 , H01L2224/83203 , H01L2224/8382 , H01L2224/9202 , H01L2224/92144 , H01L2924/00014 , H01L2924/014 , H01L2224/11
摘要： A semiconductor structure and methods of forming the semiconductor structure include a solder bump self-aligned to a through-substrate-via, wherein the solder bump and the through-substrate-via are formed of a conductive metal material, and wherein the through-substrate-via is coupled to a buried metallization layer, which is formed of a different conductive metal material.
-
公开(公告)号：US20180096980A1
公开(公告)日：2018-04-05
申请号：US15562501
申请日：2016-03-29
CPC分类号： H01L25/50 , B28D5/029 , H01L21/67092 , H01L21/67144 , H01L21/78 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L24/94 , H01L25/0657 , H01L2224/05571 , H01L2224/13009 , H01L2224/13082 , H01L2224/13116 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/73104 , H01L2224/73204 , H01L2224/75252 , H01L2224/7598 , H01L2224/81203 , H01L2224/81815 , H01L2224/83191 , H01L2224/83203 , H01L2224/83862 , H01L2224/83907 , H01L2224/9205 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2225/06565 , H01L2224/81 , H01L2224/83 , H01L2924/00014 , H01L2924/00
摘要： A method for manufacturing a semiconductor device includes laminating a plurality of semiconductor wafers via an adhesive, heating such that the adhesive reaches a specific viscosity, and pressing the semiconductor wafers under a provisional pressure bonding load such that a gap between solder of through-electrodes provided to chip parts and through-electrodes of an adjacent semiconductor wafer falls within a specific range that is greater than zero, to produce a provisional pressure-bonded laminate; cutting the provisional pressure-bonded laminate with a cutter to produce a provisional pressure-bonded laminate chip part; and heating the provisional pressure-bonded laminate chip part to at least curing temperature of the adhesive and at least melting point of the solder, and pressing the provisional pressure-bonded laminate chip part under a main pressure bonding load to produce a main pressure-bonded laminate chip part such that the solder comes into contact with the through-electrodes of adjacent chip parts.
-
公开(公告)号：US09935081B2
公开(公告)日：2018-04-03
申请号：US14464509
申请日：2014-08-20
发明人： Kuo Lung Pan , Yu-Feng Chen , Chen-Shien Chen , Mirng-Ji Lii
IPC分类号： H01L23/00 , H01L23/48 , H01L23/498 , H01L25/00 , H01L25/065 , H01L21/48 , H01L21/768
CPC分类号： H01L25/0655 , H01L21/4853 , H01L21/76898 , H01L23/481 , H01L23/49811 , H01L23/49827 , H01L24/13 , H01L24/14 , H01L24/17 , H01L24/24 , H01L24/73 , H01L24/81 , H01L24/82 , H01L24/92 , H01L25/0652 , H01L25/50 , H01L2224/13009 , H01L2224/13082 , H01L2224/131 , H01L2224/13147 , H01L2224/1403 , H01L2224/141 , H01L2224/16145 , H01L2224/16227 , H01L2224/1703 , H01L2224/32225 , H01L2224/73204 , H01L2224/73209 , H01L2224/73253 , H01L2224/81191 , H01L2224/81815 , H01L2224/81986 , H01L2224/8203 , H01L2224/82105 , H01L2224/92125 , H01L2224/92133 , H01L2224/92242 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/15153 , H01L2924/15192 , H01L2924/00014 , H01L2924/014
摘要： Methods of packaging semiconductor devices and structures thereof are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a substrate, and adhering a first semiconductor device. Chip stacks are formed by providing a plurality of semiconductor devices and bonding them to the substrate and the first semiconductor device. At least one of the provided semiconductor devices is physically connected to both the substrate and the first semiconductor device it is stack on. Other semiconductor devices may stacked by forming conductive channels in the first semiconductor device, and placing the other semiconductor devices in physical contact with the first semiconductor device and the conductive channels.
-
公开(公告)号：US09768147B2
公开(公告)日：2017-09-19
申请号：US14171169
申请日：2014-02-03
IPC分类号： H01L29/06 , H01L25/065 , H01L25/00 , H01L23/00
CPC分类号： H01L25/0657 , H01L21/76898 , H01L23/3677 , H01L23/481 , H01L24/03 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L25/50 , H01L2224/0401 , H01L2224/05025 , H01L2224/05147 , H01L2224/06102 , H01L2224/06519 , H01L2224/13009 , H01L2224/13021 , H01L2224/13025 , H01L2224/1403 , H01L2224/141 , H01L2224/16145 , H01L2224/16146 , H01L2224/17519 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/01022 , H01L2924/01074 , H01L2924/07025 , H01L2924/10253 , H01L2924/00012
摘要： Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the stack. In one embodiment, the thermal pads may be in direct contact with the semiconductor dies. Heat dissipation of the semiconductor die stack can be improved by a relatively high thermal conductivity of the thermal pads that directly contact the adjacent silicon dies in the stack without the intervening layers of the low thermal conductivity materials (e.g., passivation materials). In some embodiments, the manufacturing yield of the stack can be improved by having generally coplanar top surfaces of the thermal pads and under-bump metallization (UBM) structures.
-
公开(公告)号：US09620437B2
公开(公告)日：2017-04-11
申请号：US15047295
申请日：2016-02-18
申请人： Tessera, Inc.
IPC分类号： H01L23/48 , H01L21/768 , H01L23/498 , H01L21/78 , H01L23/14 , H01L23/00
CPC分类号： H01L23/481 , H01L21/76802 , H01L21/76805 , H01L21/76877 , H01L21/76898 , H01L21/78 , H01L23/145 , H01L23/147 , H01L23/49827 , H01L24/11 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/81 , H01L24/83 , H01L24/89 , H01L24/92 , H01L2224/0401 , H01L2224/0557 , H01L2224/13009 , H01L2224/13099 , H01L2224/16225 , H01L2224/16235 , H01L2224/83 , H01L2224/9202 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/01061 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2224/05552 , H01L2924/00
摘要： A microelectronic assembly is provided which includes a first element consisting essentially of at least one of semiconductor or inorganic dielectric material having a surface facing and attached to a major surface of a microelectronic element at which a plurality of conductive pads are exposed, the microelectronic element having active semiconductor devices therein. A first opening extends from an exposed surface of the first element towards the surface attached to the microelectronic element, and a second opening extends from the first opening to a first one of the conductive pads, wherein where the first and second openings meet, interior surfaces of the first and second openings extend at different angles relative to the major surface of the microelectronic element. A conductive element extends within the first and second openings and contacts the at least one conductive pad.
-
-
-
-
-
-
-
-
-
搜索结果
902 条记录 (耗时 0.026 秒)
