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44 条记录 (耗时 0.02 秒)

    Combination smoke and heat detector
    2.
    发明授权
    Combination smoke and heat detector 有权
    组合式烟气和热量检测器

    公开(公告)号：US08106784B2

    公开(公告)日：2012-01-31

    申请号：US12382388

    申请日：2009-03-16

    申请人： Tomohiro Katou ,  Takashi Itou ,  Kenichi Katou

    发明人： Tomohiro Katou ,  Takashi Itou ,  Kenichi Katou

    IPC分类号： G08B17/00

    CPC分类号： G08B17/107 ,  G08B17/06 ,  G08B17/113 ,  G08B29/183

    摘要： A combination smoke and heat detector which allows, in spite of a simple structure, light emitted from an indication lamp to be visually confirmed from a wide range of directions. The combination smoke and heat detector (100) includes a body base (10), a printed circuit board (1), a thermosensitive element (2), a dark chamber (3), an indication lamp (4) mounted to the printed circuit board (1), a protective cover (30), and a bar-like light guide (5) for guiding light emitted from the indication lamp (4) to the outside of the protective cover (30). The light guide (5) passes through a light guide through-hole (35) formed in the protective cover (30) so as to be mounted therein, with one end surface thereof facing the indication lamp (4), and another end surface thereof protruding to the outside of the protective cover (30) by a height substantially equal to or larger than a protruding height of the dark chamber (3). Further, the light guide (5) is arranged opposite relative to the thermosensitive element (2), with the dark chamber (3) being sandwiched therebetween.

    摘要翻译： 组合的烟和热检测器，尽管结构简单，允许从指示灯发出的光从广泛的方向被目视确认。 组合式烟和热检测器（100）包括主体（10），印刷电路板（1），热敏元件（2），暗室（3），安装到印刷电路的指示灯（4） 板（1），保护盖（30）和棒状光导（5），用于将从指示灯（4）发射的光引导到保护盖（30）的外部。 导光体（5）通过形成在保护罩（30）内的导光孔（35），安装在保护盖（30）的一端面与指示灯（4）的另一端面 以大致等于或大于暗室（3）的突出高度的高度突出到保护盖（30）的外部。 此外，导光体（5）相对于热敏元件（2）布置成相对，暗室（3）夹在其间。

    Cart transport apparatus
    3.
    发明授权
    Cart transport apparatus 失效
    购物车运输设备

    公开(公告)号：US07871234B2

    公开(公告)日：2011-01-18

    申请号：US11587544

    申请日：2005-04-27

    申请人： Shoji Yuyama ,  Takayuki Fujikawa ,  Takashi Itou ,  Hiromichi Tsuda

    发明人： Shoji Yuyama ,  Takayuki Fujikawa ,  Takashi Itou ,  Hiromichi Tsuda

    IPC分类号： B60P1/64 ,  B60P3/06

    CPC分类号： B65G65/00 ,  A61G12/001 ,  B62B5/0026 ,  B62B5/0083 ,  B62B2202/90 ,  B65G2201/027

    摘要： A cart transport apparatus for automatically transporting carts in which trays with medicine contained therein can be stored. The carts have a plurality of support panels (38) juxtaposed to each other, a lower connection member (41) connecting lower end portions of the plurality of support panels (38), and casters (44) positioned below the lower connection member (41). The cart transport apparatus includes a frame (51) having wheels (50) that can be rotatably driven. The frame (51) is movable beneath the lower connection member (41) of the cart (8). Also, the cart transfer apparatus is provided with grip members (55) for gripping the lower connection member 41 of the cart 8.

    摘要翻译： 可以存储用于自动输送其中容纳有药物的托盘的推车的小车运输装置。 推车具有彼此并置的多个支撑面板（38），连接多个支撑面板（38）的下端部的下连接构件（41）和位于下连接构件（41）下方的脚轮（44） ）。 车厢运输装置包括具有可旋转地驱动的车轮（50）的框架（51）。 框架（51）可在推车（8）的下连接构件（41）下方移动。 此外，车辆传送装置设置有用于夹持推车8的下连接构件41的抓握构件（55）。

    Semiconductor memory device with reduced power consumption during refresh operation
    4.
    发明授权
    Semiconductor memory device with reduced power consumption during refresh operation 失效
    半导体存储器件，在刷新操作期间具有降低的功耗

    公开(公告)号：US06504787B2

    公开(公告)日：2003-01-07

    申请号：US09987836

    申请日：2001-11-16

    申请人： Yayoi Tsubouchi ,  Takashi Itou

    发明人： Yayoi Tsubouchi ,  Takashi Itou

    IPC分类号： G11C800

    CPC分类号： G11C8/18 ,  G11C11/406 ,  G11C11/408

    摘要： A row-related control circuit is provided which changes for a normal read operation and for refresh operation the delay time from a time at which a word line is activated to a time at which a sense amplifier is activated. Even when the refresh period is made longer and the charges in a memory cell are reduced, the sensitivity of the sense amplifier is heightened so that the refresh operation becomes possible. Thus, power consumption can be reduced by prolonging the refresh intervals.

    摘要翻译： 提供了一种与行相关的控制电路，其对于正常读取操作和用于刷新操作的延迟时间从字线被激活的时间到读出放大器被激活的时间改变。 即使当刷新周期变长并且存储单元中的电荷减小时，增强了读出放大器的灵敏度，使得刷新操作成为可能。 因此，可以通过延长刷新间隔来降低功耗。

    Semiconductor memory device with test mode decision circuit
    5.
    发明授权
    Semiconductor memory device with test mode decision circuit 失效
    具有测试模式决定电路的半导体存储器件

    公开(公告)号：US06269038B1

    公开(公告)日：2001-07-31

    申请号：US09556290

    申请日：2000-04-24

    申请人： Takashi Itou ,  Yasuhiko Tsukikawa ,  Kengo Aritomi ,  Mikio Asakura

    发明人： Takashi Itou ,  Yasuhiko Tsukikawa ,  Kengo Aritomi ,  Mikio Asakura

    IPC分类号： G11C700

    CPC分类号： G11C29/46

    摘要： There is provided a test mode decision circuit which in the first WCBR cycle responds to an address key by activating a test mode entry signal and with the test mode entry signal activated in the second WCBR cycle responds to an address key by selectively activating test mode signals. In addition to a test mode signal having been activated, the test mode decision circuit further activates another test mode signal. Thus the DRAM hardly enter a test mode erroneously and is also capable of entering more than one test mode simultaneously.

    摘要翻译： 提供了测试模式判定电路，其在第一WCBR周期中通过激活测试模式输入信号来响应地址键，并且在第二WCBR周期中激活的测试模式输入信号通过选择性地激活测试模式信号来响应地址键 。 测试模式判定电路除了测试模式信号被激活之外，还激活另一个测试模式信号。 因此，DRAM几乎不会错误地进入测试模式，并且还能够同时进入多个测试模式。

    Circuit compensating for change in internal power supply voltage, and semiconductor integrated circuit device including such a circuit
    7.
    发明授权
    Circuit compensating for change in internal power supply voltage, and semiconductor integrated circuit device including such a circuit 失效
    内部电源电压变化的电路补偿，以及包括这种电路的半导体集成电路器件

    公开(公告)号：US06181119B2

    公开(公告)日：2001-01-30

    申请号：US09227937

    申请日：1999-01-11

    申请人： Yutaka Ikeda ,  Takashi Itou

    发明人： Yutaka Ikeda ,  Takashi Itou

    IPC分类号： G05F140

    CPC分类号： H03K17/145 ,  G05F1/56

    摘要： A semiconductor integrated circuit device includes an internal voltage-down converter and a voltage compensation circuit. The internal voltage-down converter provides an internal power supply voltage. The voltage compensation circuit includes a comparator, a capacitor, a transistor, and a constant current source. When the voltage (internal power supply voltage) of the output node suddenly drops, the potential at the positive input of the comparator is reduced by the coupling effect of the capacitor. As a result, the output node is charged. The potential of the positive input of the comparator is charged. As a result, the charging with respect to the output node ends.

    摘要翻译： 半导体集成电路器件包括内部降压转换器和电压补偿电路。 内部降压转换器提供内部电源电压。 电压补偿电路包括比较器，电容器，晶体管和恒流源。 当输出节点的电压（内部电源电压）突然下降时，比较器的正输入端的电位由于电容器的耦合效应而降低。 结果，输出节点被充电。 比较器的正输入电位被充电。 结果，相对于输出节点的充电结束。

    Monitoring and control device
    8.
    发明申请
    Monitoring and control device 审中-公开
    监控装置

    公开(公告)号：US20100214317A1

    公开(公告)日：2010-08-26

    申请号：US12657000

    申请日：2010-02-23

    申请人： Kei Miura ,  Tomoaki Sasaki ,  Hajime Yabu ,  Yuichi Yoshimura ,  Katsuhiko Kimura ,  Yuichiro Naoi ,  Takashi Itou

    发明人： Kei Miura ,  Tomoaki Sasaki ,  Hajime Yabu ,  Yuichi Yoshimura ,  Katsuhiko Kimura ,  Yuichiro Naoi ,  Takashi Itou

    IPC分类号： G09G5/00

    CPC分类号： H04L12/12 ,  H04L12/2816 ,  Y02D50/40

    摘要： A monitoring and control device for use in a remote monitoring and control system includes a display unit provided with a screen for displaying operation buttons mated with the loads, an operation input unit operable by a user, the operation input unit including a touch switch panel superimposed on the screen of the display unit and a control unit for performing display control of the display unit and load control in response to the operation of the operation input unit. The control unit includes a display control unit for causing the display unit to display one operation page selected from a plurality of operation pages containing different combinations of operation buttons and a page changeover unit for changing over the operation page displayed on the display unit in response to a user's operation.

    摘要翻译： 一种用于远程监视和控制系统的监视和控制装置，包括一个显示单元，该显示单元设有一个用于显示与负载相配的操作按钮的屏幕，一个由用户操作的操作输入单元，该操作输入单元包括一个叠加的触摸开关面板 在显示单元的屏幕上以及用于响应于操作输入单元的操作执行显示单元的显示控制和负载控制的控制单元。 控制单元包括显示控制单元，用于使显示单元显示从包含操作按钮的不同组合的多个操作页面选择的一个操作页面和用于响应于显示单元显示的显示单元上显示的操作页面的页面转换单元 用户的操作。

    Semiconductor device with reduced terminal input capacitance
    9.
    发明授权
    Semiconductor device with reduced terminal input capacitance 失效
    半导体器件具有降低的端子输入电容

    公开(公告)号：US06934204B2

    公开(公告)日：2005-08-23

    申请号：US10140196

    申请日：2002-05-08

    申请人： Takashi Itou ,  Yasuhiko Tsukikawa

    发明人： Takashi Itou ,  Yasuhiko Tsukikawa

    IPC分类号： G01R31/28 ,  G01R31/317 ,  G01R31/3185 ,  G11C7/00 ,  G11C11/401 ,  G11C29/00 ,  G11C29/14 ,  H04L1/22

    CPC分类号： G01R31/31701 ,  G11C29/1201 ,  G11C29/46

    摘要： A P-channel MOS transistor is provided between a terminal and an SVIH detection circuit for performing test mode detection. The P-channel MOS transistor is rendered non-conductive when a potential supplied to the terminal that is used commonly for signal input during the test setting and the normal operation is a power-supply potential EXTVDD or below. The SVIH detection circuit detects that a test mode is to be set when the potential at the terminal becomes higher than a prescribed potential. During the normal operation, the terminal is disconnected from the SVIH detection circuit so that the input capacitance of the terminal can be made to be about the same as that of another input terminal, and a high speed operation becomes possible. Moreover, there is no need to take into account the parasitic capacitance of an interconnection line leading to the SVIH detection circuit.

    摘要翻译： 在端子和SVIH检测电路之间提供P沟道MOS晶体管，用于执行测试模式检测。 当在测试设置和正常操作期间通常用于信号输入的端子提供的电位是电源电位EXTVDD或更低时，P沟道MOS晶体管变得不导通。 SVIH检测电路检测到当端子电位变得高于规定电位时，要设置测试模式。 在正常工作期间，端子与SVIH检测电路断开，使得端子的输入电容可以与其他输入端子的输入电容大致相同，并且可以进行高速运转。 此外，不需要考虑通向SVIH检测电路的互连线的寄生电容。

    Semiconductor integrated circuit device capable of externally monitoring internal voltage
    10.
    发明授权
    Semiconductor integrated circuit device capable of externally monitoring internal voltage 失效
    半导体集成电路器件能够外部监测内部电压

    公开(公告)号：US06339357B1

    公开(公告)日：2002-01-15

    申请号：US09023288

    申请日：1998-02-13

    申请人： Kyoji Yamasaki ,  Takashi Itou

    发明人： Kyoji Yamasaki ,  Takashi Itou

    IPC分类号： G05F110

    CPC分类号： G11C29/028 ,  G11C5/147 ,  G11C29/50 ,  G11C2029/5004

    摘要： A test on a desired internal voltage is easily and accurately conducted without increasing current dissipation or the number of pads. A driving circuit receiving a reference voltage from a reference voltage generating circuit has a high input impedance and low output impedance, and generates a voltage substantially at the same voltage level as the reference voltage received, and transmits the generated voltage to a pad with a current driving capability larger than the driving current capability of the reference voltage generating circuit.

    摘要翻译： 在不增加电流消耗或焊盘数量的情况下，可以容易且准确地进行所需内部电压的测试。 从参考电压产生电路接收参考电压的驱动电路具有高输入阻抗和低输出阻抗，并且产生基本上与接收到的基准电压相同的电压电平的电压，并将产生的电压发送到具有电流的焊盘 驱动能力大于参考电压发生电路的驱动电流能力。