公开(公告)号：US20060033696A1

公开(公告)日：2006-02-16

申请号：US11202338

申请日：2005-08-12

申请人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

发明人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

IPC分类号： G09G3/36

CPC分类号： G09G3/3659 ,  G09G3/3614 ,  G09G3/3655 ,  G09G3/3677 ,  G09G2300/0491 ,  G09G2300/0876 ,  G09G2310/0205 ,  G09G2310/0251 ,  G09G2310/0283 ,  G09G2310/062 ,  G09G2320/0219 ,  G09G2320/0261

摘要： A gate line driving circuit includes a shift register section that selects gate lines for gradation display in units of one gate line, and selects the gate lines for black insertion in units of a group including at least two adjacent gate lines, and an output circuit that outputs driving signals to the gate lines selected by the shift register section. In particular, the output circuit is configured such that an output period of a driving signal to an odd-numbered gate line, which is included in the group selected for black insertion by the shift register section and extends along a row of liquid crystal pixels that are capacitive-coupled to a non-selected gate line other than the gate lines of the group, is set to be shorter than an output period of a driving signal to an even-numbered gate line of the group.

摘要翻译： 栅极线驱动电路包括移位寄存器部分，其以一个栅极线为单位选择用于灰度显示的栅极线，并且以包括至少两个相邻栅极线的组为单位选择用于黑色插入的栅极线，以及输出电路 将驱动信号输出到由移位寄存器部选择的栅极线。 特别地，输出电路被配置为使得包括在由移位寄存器部分黑插入并且沿着一行液晶像素延伸的组中包括的组中的奇数编号线的驱动信号的输出周期 被电容耦合到除了​​组的栅极线之外的非选择栅极线，被设置为比组的偶数栅极线的驱动信号的输出周期短。

公开(公告)号：US20060028463A1

公开(公告)日：2006-02-09

申请号：US11197400

申请日：2005-08-05

申请人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

发明人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

IPC分类号： G09G5/00

CPC分类号： G09G3/3677 ,  G09G2320/0261 ,  G11C19/28

摘要： A gate line driving circuit includes a shift register for gradation display, which shifts a first start signal in response to a first clock signal such that the gate lines are selected for gradation display in one vertical scanning period, and a shift register for black insertion, which shifts a second start signal in response to a second clock signal synchronous with the first clock signal such that the gate lines are selected for black insertion in a period substantially equal to the vertical scanning period, and an output circuit that outputs, under control of a first output enable signal, a driving signal to the gate line selected by the shift register for gradation display, and outputs, under control of a second output enable signal, a driving signal to the gate line selected by the shift register for black insertion.

摘要翻译： 栅极线驱动电路包括用于灰度显示的移位寄存器，其响应于第一时钟信号移位第一起始信号，使得在一个垂直扫描周期中选择栅极线用于灰度显示，以及用于黑插入的移位寄存器， 其响应于与第一时钟信号同步的第二时钟信号来移位第二起始信号，使得在基本上等于垂直扫描周期的周期中选择栅极线用于黑插入;以及输出电路，其在 第一输出使能信号，由用于灰度显示的移位寄存器选择的栅极线的驱动信号，并且在第二输出使能信号的控制下，向由用于黑色插入的移位寄存器选择的栅极线输出驱动信号。

公开(公告)号：US20060038767A1

公开(公告)日：2006-02-23

申请号：US11206768

申请日：2005-08-19

申请人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

发明人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/02 ,  G09G2310/0245 ,  G09G2310/06 ,  G09G2310/061 ,  G09G2320/0223

摘要： A gate line driving circuit includes a shift register section that selects gate lines for gradation display and for black insertion, and an output circuit that outputs a driving signal to the gate line which is selected by the shift register section. In particular, the output circuit is configured to obtain an overlap between an output period of a driving signal to each selected gate line and an output period of a driving signal to a gate line that is driven in precedence to the selected gate line, and independently control a first preliminary driving period corresponding to the overlap for gradation display and a second preliminary driving period corresponding to the overlap for black insertion.

摘要翻译： 栅极线驱动电路包括选择用于灰度显示和黑插入的栅极线的移位寄存器部分，以及向由移位寄存器部选择的栅极线输出驱动信号的输出电路。 特别地，输出电路被配置为获得驱动信号对每个选择的栅极线的输出周期与驱动信号的输出周期与优先选择的栅极线驱动的栅极线的重叠，并且独立地 控制对应于灰度显示的重叠的第一初步驱动周期和与黑插入的重叠相对应的第二初步驱动周期。

公开(公告)号：US20060028421A1

公开(公告)日：2006-02-09

申请号：US11197395

申请日：2005-08-05

申请人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

发明人： Tetsuya Nakamura ,  Seiji Kawaguchi ,  Masahiko Takeoka

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G3/2011 ,  G09G2310/0218 ,  G09G2310/061 ,  G09G2330/025

摘要： A gate line driving circuit includes a plurality of OR gate circuits which selects each of at least two groups obtained by dividing gate lines, and a level shifter which outputs driving signals to the gate lines of a group that is selected by the OR gate circuits. The OR gate circuits are configured such that the groups of gate lines are selected at different timings in an initialization for transferring the OCB liquid crystal pixels from a splay alignment to a bend alignment upon supply of power.

摘要翻译： 栅极线驱动电路包括多个OR门电路，其选择通过划分栅极线获得的至少两个组中的每一个;以及电平移位器，其将驱动信号输出到由或门电路选择的组的栅极线。 OR门电路被配置为使得在用于在供电时将OCB液晶像素从喷射取向转移到弯曲取向的初始化中以不同的定时选择栅极线组。

公开(公告)号：US20090015536A1

公开(公告)日：2009-01-15

申请号：US12166820

申请日：2008-07-02

申请人： Masahiko Takeoka ,  Seiji Kawaguchi

发明人： Masahiko Takeoka ,  Seiji Kawaguchi

IPC分类号： G09G3/36

CPC分类号： G09G3/342 ,  G09G3/3651 ,  G09G2300/0491 ,  G09G2310/024 ,  G09G2310/062 ,  G09G2320/0238 ,  G09G2320/0276 ,  G09G2320/064 ,  G09G2320/0646

摘要： A display area in a liquid crystal display apparatus is divided into five blocks extending in the lateral direction, is controlled to have a black writing period, a video writing period and a video holding period in each block in this order, and is controlled to delay the video writing period of the kth block in comparison with the video writing period in the (k−1)th block by a predetermined time period.

摘要翻译： 液晶显示装置中的显示区域被分成沿横向方向延伸的五个块，按顺序被控制为在每个块中具有黑色写入周期，视频写入周期和视频保持周期，并且被控制为延迟 与第（k-1）块中的视频写入周期相比预定时间段的第k个块的视频写入周期。

公开(公告)号：US20060007084A1

公开(公告)日：2006-01-12

申请号：US11094460

申请日：2005-03-31

申请人： Masahiko Takeoka ,  Seiji Kawaguchi

发明人： Masahiko Takeoka ,  Seiji Kawaguchi

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G2310/0248

摘要： The liquid crystal display device includes a liquid crystal display panel provided with source signal lines and gate signal lines arranged in matrix form and liquid crystal display elements using OCB mode liquid crystal provided at intersections between the source signal lines and gate signal lines, a gate driver which supplies a gate signal to the gate signal lines and a source driver which supplies a voltage corresponding to gradation of the display data to the source signal lines during a display period and supplies a voltage to prevent counter-transfer to the source signal lines during a counter-transfer prevention drive period, and the source driver supplies a voltage lower by a predetermined value than the voltage corresponding to the black color as the voltage to prevent counter-transfer.

摘要翻译： 液晶显示装置包括：液晶显示面板，设置有以矩阵形式布置的源极信号线和栅极信号线;以及液晶显示元件，使用在源极信号线和栅极信号线之间的交点处提供的OCB模式液晶，栅极驱动器 其向栅极信号线提供栅极信号，以及源极驱动器，其在显示周期期间将对应于显示数据的灰度的电压提供给源极信号线，并且在一个期间提供电压以防止对源极信号线的反向传输 反向转移防止驱动期间，并且源极驱动器提供低于与黑色相对应的电压的预定值的电压作为电压以防止反向传输。

公开(公告)号：US20060012590A1

公开(公告)日：2006-01-19

申请号：US11144936

申请日：2005-06-06

申请人： Masahiko Takeoka

发明人： Masahiko Takeoka

IPC分类号： G09G5/00

CPC分类号： G09G3/3648 ,  G02F1/133382 ,  G09G3/3655 ,  G09G2320/0252 ,  G09G2320/041 ,  G09G2330/026

摘要： A liquid crystal display device comprises a liquid crystal display panel including a liquid crystal layer for a display in an OCB mode, a heating unit which heats the liquid crystal display panel, a temperature detecting unit for detecting a temperature of the liquid crystal display panel, a time measuring unit which measures a heating time that the heating unit has operated, and a transfer drive circuit which applies a transfer drive voltage to the liquid crystal layer to transfer the alignment state of liquid crystal molecules from a splay alignment to a bend alignment in advance. The transfer drive circuit is configured to determine a transfer time as an application period of the transfer drive voltage on the basis of a relationship between the heating time and temperature which are obtained from the time measuring unit and temperature detecting unit at a desired timing.

摘要翻译： 液晶显示装置包括：液晶显示面板，包括用于OCB模式显示的液晶层，加热液晶显示面板的加热单元，用于检测液晶显示面板的温度的温度检测单元; 测量加热单元运转的加热时间的时间测量单元和向液晶层施加转印驱动电压以将液晶分子的取向状态从喷射取向转移到弯曲取向的转印驱动电路 提前。 传送驱动电路被配置为基于在所需时刻从时间测量单元和温度检测单元获得的加热时间和温度之间的关系来确定传送时间作为传送驱动电压的施加周期。

公开(公告)号：US07315343B2

公开(公告)日：2008-01-01

申请号：US11144936

申请日：2005-06-06

申请人： Masahiko Takeoka

发明人： Masahiko Takeoka

IPC分类号： G02F1/1333

CPC分类号： G09G3/3648 ,  G02F1/133382 ,  G09G3/3655 ,  G09G2320/0252 ,  G09G2320/041 ,  G09G2330/026

摘要： A liquid crystal display device comprises a liquid crystal display panel including a liquid crystal layer for a display in an OCB mode, a heating unit which heats the liquid crystal display panel, a temperature detecting unit for detecting a temperature of the liquid crystal display panel, a time measuring unit which measures a heating time that the heating unit has operated, and a transfer drive circuit which applies a transfer drive voltage to the liquid crystal layer to transfer the alignment state of liquid crystal molecules from a splay alignment to a bend alignment in advance. The transfer drive circuit is configured to determine a transfer time as an application period of the transfer drive voltage on the basis of a relationship between the heating time and temperature which are obtained from the time measuring unit and temperature detecting unit at a desired timing.

摘要翻译： 液晶显示装置包括：液晶显示面板，包括用于OCB模式显示的液晶层，加热液晶显示面板的加热单元，用于检测液晶显示面板的温度的温度检测单元; 测量加热单元运转的加热时间的时间测量单元和向液晶层施加转印驱动电压以将液晶分子的取向状态从喷射取向转移到弯曲取向的转印驱动电路 提前。 传送驱动电路被配置为基于在所需时刻从时间测量单元和温度检测单元获得的加热时间和温度之间的关系来确定传送时间作为传送驱动电压的施加周期。