摘要:
The invention relates to a Group III nitride-based compound semiconductor light-emitting device having a well layer, a first layer formed on one surface of the well layer, a second layer formed on the other surface of the well layer, a first region provided in the vicinity of the interface between the first layer and the well layer, and a second region provided in the vicinity of the interface between the second layer and the well layer, wherein the first and second regions are formed such that the lattice constants of the first and second layers approach the lattice constant of the well layer. The invention also relates to a method for producing a Group III nitride-based compound semiconductor light-emitting device having a light-emitting layer of a single or multiple quantum well structure including at least an indium (In)-containing well layer, wherein, during formation of the well layer through vapor growth, an In source is fed through a procedure including: initiating feeding of the In source at a minimum feed rate; subsequently, elevating the In source feed rate to a target feed rate; maintaining the feed rate at the target feed rate; and subsequently, lowering the feed rate from the target feed rate to the minimum feed rate, and a Group III source other than the In source is fed at a constant feed rate from initiation of feeding of the In source to termination of the feeding.
摘要:
A Group III nitride-based compound semiconductor light-emitting device having a quantum well structure, includes a well layer, a first layer formed on one surface of the well layer, a second layer formed on the other surface of the well layer, a first region provided in the vicinity of the interface between the first layer and the well layer, and a second region provided in the vicinity of the interface between the second layer and the well layer. A composition of the first and second regions gradually changes such that the lattice constants of the first and second layers approach the lattice constant of the well layer as a position approaches said well layer.
摘要:
The back surface of a semiconductor crystal substrate 102 which has a thickness of about 150 μm and is made of undoped GaN bulk crystal consists of a polished plane 102a which is flattened through dry-etching and a grinded plane 102b which is formed in a taper shape and is flattened through dry-etching. On about 10 nm in thickness of GaN n-type clad layer (low carrier concentration layer) 104, about 2 nm in thickness of Al0.005In0.045Ga0.95N well layer 51 and about 18 nm in thickness of Al0.12Ga0.88N barrier layer 52 are deposited alternately as an active layer 105 which emits ultraviolet light and has MQW structure comprising 5 layers in total. Before forming a negative electrode (n-electrode c) on the polished plane of the semiconductor substrate a, the polished plane is dry-etched.
摘要翻译:半导体晶体基板102的背面,其厚度为约150μm,由未掺杂的GaN体晶体制成,其由经干蚀刻而平坦化的抛光平面102a和形成在其中的研磨平面102b 锥形,并通过干蚀刻变平。 在GaN n型覆层(低载流子浓度层)104的厚度约为10nm的情况下,厚度为约0.01nm的Al 0.005 In 0.95 Ga 0.95 N阱层51和厚度约为18nm的Al 0.12 N Ga 0.88 N阻挡层52交替地沉积为发射紫外光的有源层105和 总共有5层MQW结构。 在半导体衬底a的抛光平面上形成负电极(n电极c)之前,对该抛光平面进行干式蚀刻。