公开(公告)号：US20160134283A1

公开(公告)日：2016-05-12

申请号：US14938702

申请日：2015-11-11

Applicant: Texas Instruments Incorporated

Inventor： Vikrant Dhamdhere ,  Kyle Schulmeyer ,  Md. Abidur Rahman

IPC: H03K17/687 ,  H02M3/07 ,  H01L23/528 ,  H01L27/06 ,  H01L23/50

CPC classification number: H03K17/687 ,  H01L2924/0002 ,  H02M1/08 ,  H02M2001/322 ,  H03K17/063 ,  H03K19/0016 ,  H03K2217/0054 ,  H03K2217/0063 ,  H03K2217/0072 ,  H03K2217/0081 ,  H01L2924/00

Abstract: An output discharge circuit for a load switch may include a capacitor coupled between a power rail of the output discharge circuit and a ground lead, and a diode coupled between a power input of the output discharge circuit and the power rail. The output discharge circuit may charge the capacitor via a current path formed by the diode while power is being supplied to the load switch. When the power supply to the output discharge circuit is turned off, the diode may prevent the capacitor from discharging through the current path, and the stored charge on the capacitor may be used to power the output discharge switch for a period of time after the power supply has been turned off. In this way, the output discharge circuit may continue to discharge the output of the load switch even when power is no longer being supplied to the load switch.

Abstract translation: 用于负载开关的输出放电电路可以包括耦合在输出放电电路的电源轨和接地引线之间的电容器和耦合在输出放电电路的电源输入端与电源轨之间的二极管。 当向负载开关供电时，输出放电电路可以通过由二极管形成的电流通路对电容器充电。 当输出放电电路的电源关闭时，二极管可以防止电容器通过电流通路放电，电容器上的存储电荷可以用于在输出电源之后的一段时间内为输出放电开关供电 供应已经关闭。 以这种方式，即使当不再向负载开关供电时，输出放电电路也可以继续放电负载开关的输出。

公开(公告)号：US10187055B2

公开(公告)日：2019-01-22

申请号：US15694005

申请日：2017-09-01

Applicant: Texas Instruments Incorporated

Inventor： Vikrant Dhamdhere ,  Kyle Schulmeyer ,  Md. Abidur Rahman

IPC: H03K3/00 ,  H03K17/687 ,  H02M1/32 ,  H03K17/06 ,  H03K19/00 ,  H02M1/08

Abstract: An output discharge circuit for a load switch may include a capacitor coupled between a power rail of the output discharge circuit and a ground lead, and a diode coupled between a power input of the output discharge circuit and the power rail. The output discharge circuit may charge the capacitor via a current path formed by the diode while power is being supplied to the load switch. When the power supply to the output discharge circuit is turned off, the diode may prevent the capacitor from discharging through the current path, and the stored charge on the capacitor may be used to power the output discharge switch for a period of time after the power supply has been turned off. In this way, the output discharge circuit may continue to discharge the output of the load switch even when power is no longer being supplied to the load switch.

公开(公告)号：US20170366182A1

公开(公告)日：2017-12-21

申请号：US15694005

申请日：2017-09-01

Applicant: Texas Instruments Incorporated

Inventor： Vikrant Dhamdhere ,  Kyle Schulmeyer ,  Md. Abidur Rahman

IPC: H03K17/687 ,  H02M1/32

CPC classification number: H03K17/687 ,  H01L2924/0002 ,  H02M1/08 ,  H02M2001/322 ,  H03K17/063 ,  H03K19/0016 ,  H03K2217/0054 ,  H03K2217/0063 ,  H03K2217/0072 ,  H03K2217/0081 ,  H01L2924/00

Abstract: An output discharge circuit for a load switch may include a capacitor coupled between a power rail of the output discharge circuit and a ground lead, and a diode coupled between a power input of the output discharge circuit and the power rail. The output discharge circuit may charge the capacitor via a current path formed by the diode while power is being supplied to the load switch. When the power supply to the output discharge circuit is turned off, the diode may prevent the capacitor from discharging through the current path, and the stored charge on the capacitor may be used to power the output discharge switch for a period of time after the power supply has been turned off. In this way, the output discharge circuit may continue to discharge the output of the load switch even when power is no longer being supplied to the load switch.

公开(公告)号：US09871514B1

公开(公告)日：2018-01-16

申请号：US15196323

申请日：2016-06-29

Applicant: Texas Instruments Incorporated

Inventor： Kyle Schulmeyer ,  Sualp Aras ,  Abidur Rahman

IPC: H03K17/687 ,  H03K5/08 ,  H02M3/07

CPC classification number: H03K17/687 ,  H02M1/32 ,  H02M3/07 ,  H02M3/156 ,  H02M2001/0009 ,  H03K5/08 ,  H03K17/0822

Abstract: An apparatus includes a FET device having a drain terminal, source terminal and a gate terminal; a first supply voltage coupled to the drain terminal of the FET; an output terminal coupled to the source terminal of the FET; a bias current supply coupled to the gate terminal of the FET; a second supply voltage coupled to the gate terminal of the FET; a current sensing circuit coupled to output a sense current proportional to the current flowing through the FET; a current limit comparator coupled to the sense current and comparing the sense current to a predetermined limit current; a pull down current circuit coupled to remove current from the gate terminal of the FET; a current time derivative circuit coupled to the sense current and outputting a sense rate current; and a circuit coupled to receive the sense rate current and coupled to the bias current supply.

公开(公告)号：US20180006643A1

公开(公告)日：2018-01-04

申请号：US15196323

申请日：2016-06-29

Applicant: Texas Instruments Incorporated

Inventor： Kyle Schulmeyer ,  Sualp Aras ,  Abidur Rahman

IPC: H03K17/687 ,  H03K5/08 ,  H02M3/07

CPC classification number: H03K17/687 ,  H02M1/32 ,  H02M3/07 ,  H02M3/156 ,  H02M2001/0009 ,  H03K5/08 ,  H03K17/0822

Abstract: An apparatus includes a FET device having a drain terminal, source terminal and a gate terminal; a first supply voltage coupled to the drain terminal of the FET; an output terminal coupled to the source terminal of the FET; a bias current supply coupled to the gate terminal of the FET; a second supply voltage coupled to the gate terminal of the FET; a current sensing circuit coupled to output a sense current proportional to the current flowing through the FET; a current limit comparator coupled to the sense current and comparing the sense current to a predetermined limit current; a pull down current circuit coupled to remove current from the gate terminal of the FET; a current time derivative circuit coupled to the sense current and outputting a sense rate current; and a circuit coupled to receive the sense rate current and coupled to the bias current supply.

公开(公告)号：US09269703B2

公开(公告)日：2016-02-23

申请号：US14453907

申请日：2014-08-07

Applicant: Texas Instruments Incorporated

Inventor： Ponnarith Pok ,  Kyle Schulmeyer ,  Roger A. Cline ,  Charvaka Duvvury

IPC: H01L21/00 ,  H01L27/02 ,  H01L21/8234 ,  H01L27/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0255 ,  H01L21/823481 ,  H01L27/0274 ,  H01L27/0629 ,  H01L29/66136 ,  H01L29/78

Abstract: An ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device. A method of forming an ESD protection circuit with a diode string coupled to a diode-isolated, gate-grounded NMOS ESD device.

Abstract translation: 一个ESD保护电路，其二极管串耦合到二极管隔离的栅极接地NMOS ESD器件。 一种形成具有耦合到二极管隔离的栅极接地NMOS ESD器件的二极管串列的ESD保护电路的方法。

公开(公告)号：US09755638B2

公开(公告)日：2017-09-05

申请号：US14938702

申请日：2015-11-11

Applicant: Texas Instruments Incorporated

Inventor： Vikrant Dhamdhere ,  Kyle Schulmeyer ,  Md. Abidur Rahman

IPC: H03K3/00 ,  H03K17/687 ,  H02M1/32

CPC classification number: H03K17/687 ,  H01L2924/0002 ,  H02M1/08 ,  H02M2001/322 ,  H03K17/063 ,  H03K19/0016 ,  H03K2217/0054 ,  H03K2217/0063 ,  H03K2217/0072 ,  H03K2217/0081 ,  H01L2924/00

Abstract: An output discharge circuit for a load switch may include a capacitor coupled between a power rail of the output discharge circuit and a ground lead, and a diode coupled between a power input of the output discharge circuit and the power rail. The output discharge circuit may charge the capacitor via a current path formed by the diode while power is being supplied to the load switch. When the power supply to the output discharge circuit is turned off, the diode may prevent the capacitor from discharging through the current path, and the stored charge on the capacitor may be used to power the output discharge switch for a period of time after the power supply has been turned off. In this way, the output discharge circuit may continue to discharge the output of the load switch even when power is no longer being supplied to the load switch.