公开(公告)号：US20170083471A1

公开(公告)日：2017-03-23

申请号：US15367218

申请日：2016-12-02

Applicant: The Regents of the University of Michigan

Inventor： Supreet JELOKA ,  Sandunmalee Nilmini ABEYRATNE ,  Ronald George DRESLINSKI ,  Reetuparna DAS ,  Trevor Nigel MUDGE ,  David Theodore BLAAUW

IPC: G06F13/40 ,  G06F13/16

CPC classification number: G06F13/4022 ,  G06F13/1642 ,  G06F13/374 ,  G06F2213/0038 ,  G11C7/10 ,  G11C7/1012 ,  H03K17/693

Abstract: An interconnect within an integrated circuit provides arbitration to select one of a plurality of signal inputs for connection to a signal output. The arbitration applied uses a first arbitration parameter value, in the form of a time stamp value, and, if two or more signal inputs share such a time stamp value, then uses a second arbitration parameter, in the form of a least recently granted value. The time increment applied to the time stamp value associated with each signal input when it is granted access to the signal output is selected to reflect the quality of service to be associated with that signal input. When a comparison is made between time stamp values, the lowest time stamp value is given priority. A large time increment value corresponds to a low priority (quality of service).

公开(公告)号：US20160189769A1

公开(公告)日：2016-06-30

申请号：US14586076

申请日：2014-12-30

Applicant: The Regents of the University of Michigan

Inventor： Supreet JELOKA ,  David Theodore BLAAUW

IPC: G11C11/419

CPC classification number: G11C15/043 ,  G06F17/30982 ,  G11C7/067 ,  G11C7/1006 ,  G11C11/419 ,  G11C15/04

Abstract: A storage device has a plurality of storage cells for storing data values. Control circuitry is provided to simultaneously couple at least two cells to at least one common signal line. Sensing circuitry is provided to sense a signal on the at least one common signal line, which indicates a result of a logical operation applied to the data values stored in each of the at least two storage cells. This allows logic operations such as AND, OR, XOR, etc. to be performed within a storage device so that it is not necessary to read out each data value independently and transfer each data value to a separate processing circuit in order to find the result of the logical operation. This helps to improve performance within a data processing apparatus having the storage device.

Abstract translation: 存储装置具有用于存储数据值的多个存储单元。 提供控制电路以同时将至少两个单元耦合到至少一个公共信号线。 提供感测电路以感测至少一个公共信号线上的信号，其指示应用于存储在至少两个存储单元中的每一个中的数据值的逻辑运算的结果。 这允许在存储设备内执行诸如AND，OR，XOR等的逻辑操作，使得不需要独立地读出每个数据值，并将每个数据值传送到单独的处理电路以便找到结果 的逻辑运算。 这有助于提高具有存储装置的数据处理装置中的性能。