摘要:
The present invention relates to a device able to receive packets circulating in a packet communication network, said device comprising: the means to receive packets from said network, said packets comprising samples coming from a sampling of a counting ramp having a range EX according to a sampling clock, said counting ramp being timed by a clock with a period of T_VID, said means extracting said samples from received packets, the means to regenerate counting ramps with a range EX, the means (PLL) receiving the samples and also delivering local samples of counting ramps realised according to sampling clock and a reconstituted clock with a period T_VID, the counting ramps being timed by the clock, the means to produce counting ramps timed by the clock and having a range EX_I where EX=m.EX_I, m being a whole number necessarily greater than 1, the counting ramps being set to zero at each passage of the counting ramp by a fixed whole number M where 0
摘要:
The present invention relates to a device able to receive packets circulating in a packet-switching network. The packets include information on a synchronization signal. The device is configured for producing first and second pulses synchronous with the synchronization signal. The first and second pulses have different periods, which are integer value multiples of the synchronization signal period.
摘要:
The present invention relates to a sending device able to send packets in a network comprising at least two stations, the said device comprising means for extracting image pips on the basis of a synchronization signal, initializing an image counter on the basis of the image pips, initializing a counter every “m” zero-crossings of the image counter, the counter being regulated by a clock produced by the image counter, sampling the counter every period Tsmp, where Tsmp emanates from a time base synchronized on all the stations of the said network; and sending packets containing the samples of the counter in the network. According to the invention, it comprises means for receiving packets containing samples sent by a station of the network as echo to the samples and when samples are received for: evaluating a duration of propagation of samples over an outward-return trip between the said device and the said station; determining a phase shift value Δφ on the basis of the duration of propagation; sending the phase shift value Δφ in the network.
摘要:
The present invention relates to the domain of video equipment. It relates to a phase-locked loop able to recover the timing of a synchronization signal comprising a temporal discontinuity of a maximum amplitude equal to PCR_Modulus, the loop comprising:a sample comparator comparing the samples and the local samples of a synthesised signal,means for producing the synthesised signal from a corrected signal,a corrector receiving a comparison result delivered by the comparison means and delivering the corrected signal, According to the invention, the comparison means comprises the means to determine a difference in value between the local samples and the samples of the synchronisation signal and in that the comparison result has a value that depends on the value ε and on the difference between the value ε and the value PCR_Modulus/2.
摘要:
The present invention relates to a reception device able to receive packets in a communication network comprising at least two stations. The device comprises means for: receiving packets containing samples of the network which originate from data sampled every period Tsmp, where Tsmp emanates from a time base synchronized on all the stations of the said network; regenerating a counting ramp with the aid of a loop receiving the samples and furthermore delivering local samples every period Tsmp and a clock; the phase-locked loop comprises: a samples comparator comparing the samples and the local samples and delivering an error signal; a corrector receiving the signal and delivering a corrected error signal, the corrector having a static gain equal to 1; a digital oscillator receiving the corrected error signal and delivering the clock, which has a frequency dependent on the signal and is proportional to a gain. According to the invention, the phase-locked loop comprises, furthermore, a gain adjustment device which determines a gain value as a function of the error signal.
摘要:
A synchronization aid device is part of receiving communication equipment of an IP network, having a primary clock signal consisting of primary clock pulses spaced apart by a first period. This device comprises i) a required to increment its value by one unit on each primary clock pulse and reset its value to zero each time it reaches a value M, ii) detection means required to generate a secondary clock pulse each time the value of the counter is zero, the secondary clock pulses forming a secondary clock signal having a second period equal to M times the first period, and iii) control means required, each time the receiving equipment receives a packet containing at least one first bit having a first value, to initialize the counter with a chosen value.
摘要:
The invention concerns a device able for receiving packets in a packet communication network comprising at least two stations, characterized in that it includes: phase-locked loop, as well as means for: receiving packets containing samples of said network, said samples being derived from data sampled every Tech period, where Tech is derived from a time base synchronized on all the stations of said network and said samples being associated with incremental values predicting at least one sample, calculating, in case of interruption of packet reception, a prediction of a sample that should have been received, by adding an increment value to a received sample value. The invention also concerns a device for transmitting packets in a packet communication network.
摘要:
The present invention relates to the domain of synchronization of items of equipment connected by a packet switching network. It relates more specifically to a system for generation of a synchronization signal (PIPA, PIPB) and a clock signal (CLK_outA, CLK_outB) by a slave station (SA, SB) connected to a master station (SM) via a packet switching network. The master station (SM) is conformed to produce a master clock signal (CLKM) of frequency FM and a master synchronization signal (PIPM). The master synchronization signal (PIPM) is in phase with the master clock signal (SM). The slave station (SA, SB) comprises the primary synthesis means (SM1A, SM1B) producing a slave periodic signal TICKSA, TICKSB), the periodic signal (TICKSA, TICKSB) is in phase with the master clock signal (CLKM). According to the invention, the slave station (SA, SB) also comprises the secondary means of synthesis (SM2A, SM2B) to synthesize a clock signal (CLK_outA, CLK_outB) and the synchronization signal (PIPA, PIPB) and in that said clock signal (CLK_outA, CLK_outB) and said synchronization signal (PIPA, PIPB) are in phase with said signal (TICKSA, TICKSB).
摘要:
The invention concerns a device for transmitting packets in a packet communication network comprising at least two stations, characterized in that it includes means for: extract image cues from a synchronizing signal, initializing a first counter based on said image cues, initializing a second counter every “m” zero crossing of the first counter, sampling the second counter at all the Tech periods, where Tech is derived from a time base synchronized on all the network stations, and transmitting packets containing the samples in the network. The invention also concerns a device for receiving packets in a packet communication network comprising at least two stations.
摘要:
A reception device is able to receive packets in a communication network comprising at least two stations. The device is capable of receiving packets containing samples of the network which originate from data sampled every period Tsmp, where Tsmp emanates from a time base synchronized on all the stations of the said network; regenerating a counting ramp with the aid of a loop receiving the samples and furthermore delivering local samples every period Tsmp and a clock. The phase-locked loop comprises: a samples comparator comparing the samples and the local samples and delivering an error signal; a corrector receiving the signal and delivering a corrected error signal, the corrector having a static gain equal to 1; a digital oscillator receiving the corrected error signal and delivering the clock, which has a frequency dependent on the signal and is proportional to a gain. According to the invention, the phase-locked loop comprises, furthermore, a gain adjustment device which determines a gain value as a function of the error signal.