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1.发明授权Circuit arrangement, apparatus and process for the serial sending of data via a connection contact 有权通过连接触点串行发送数据的电路布置，装置和过程公开(公告)号：US08594225B2
公开(公告)日：2013-11-26
申请号：US12370702
申请日：2009-02-13
申请人： Thilo Rubehn , Joachim Ritter , Gert Umbach , Dieter Baecher , Wolfgang Horn , Joerg Franke
发明人： Thilo Rubehn , Joachim Ritter , Gert Umbach , Dieter Baecher , Wolfgang Horn , Joerg Franke
IPC分类号： H04L27/00
CPC分类号： G01R31/31713 , G01R31/31726
摘要： The invention relates to an integrated circuit arrangement with connection contacts for the serial exchange of data and/or signals with external components and apparatuses and with a control apparatus and/or a serial interface for the clocked receiving of data by means of a signal voltage on such a connection contact, which voltage is modulated between at least one low, one middle and one high voltage state. The control apparatus and/or the interface are designed in such a manner that data is sent in a sending mode via the connection contact in that the switching apparatus, after having received a slope changing in particular from the middle voltage state into in particular the higher or the lower voltage state, pulls the voltage state into the in particular opposite lower or higher voltage state. Furthermore, the invention relates to an apparatus and a process for operating such a circuit arrangement.
摘要翻译： 本发明涉及一种具有连接触点的集成电路装置，用于与外部组件和装置的数据和/或信号串行交换，并具有控制装置和/或串行接口，用于通过信号电压在时钟上接收数据 这种连接接点，该电压在至少一个低电压，一个中间电压和一个高电压状态之间被调制。 控制装置和/或接口被设计成在接收到特别是从中间电压状态变化的斜率特别是更高的数据之后，经由连接触点以发送模式发送数据，因为开关装置 或较低电压状态，将电压状态拉至特别相反的较低或较高电压状态。 此外，本发明涉及一种用于操作这种电路装置的装置和方法。
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2.发明申请CIRCUIT ARRANGEMENT, APPARATUS AND PROCESS FOR THE SERIAL SENDING OF DATA VIA A CONNECTION CONTACT 有权电路布置，通过连接数字连续传送数据的方法和过程公开(公告)号：US20090252210A1
公开(公告)日：2009-10-08
申请号：US12370702
申请日：2009-02-13
申请人： Thilo Rubehn , Joachim Ritter , Gert Umbach , Dieter Baecher , Wolfgang Horn , Joerg Franke
发明人： Thilo Rubehn , Joachim Ritter , Gert Umbach , Dieter Baecher , Wolfgang Horn , Joerg Franke
CPC分类号： G01R31/31713 , G01R31/31726
摘要： The invention relates to an integrated circuit arrangement with connection contacts for the serial exchange of data and/or signals with external components and apparatuses and with a control apparatus and/or a serial interface for the clocked receiving of data by means of a signal voltage on such a connection contact, which voltage is modulated between at least one low, one middle and one high voltage state. The control apparatus and/or the interface are designed in such a manner that data is sent in a sending mode via the connection contact in that the switching apparatus, after having received a slope changing in particular from the middle voltage state into in particular the higher or the lower voltage state, pulls the voltage state into the in particular opposite lower or higher voltage state. Furthermore, the invention relates to an apparatus and a process for operating such a circuit arrangement.
摘要翻译： 本发明涉及一种具有连接触点的集成电路装置，用于与外部组件和装置的数据和/或信号串行交换，并具有控制装置和/或串行接口，用于通过信号电压在时钟上接收数据 这种连接接点，该电压在至少一个低电压，一个中间电压和一个高电压状态之间被调制。 控制装置和/或接口被设计成在接收到特别是从中间电压状态变化的斜率特别是更高的数据之后，经由连接触点以发送模式发送数据，因为开关装置 或较低电压状态，将电压状态拉至特别相反的较低或较高电压状态。 此外，本发明涉及一种用于操作这种电路装置的装置和方法。
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3.发明授权Nonvolatile memory device comprising a programming and deletion checking option 有权包括编程和删除检查选项的非易失性存储器件公开(公告)号：US07975191B2
公开(公告)日：2011-07-05
申请号：US11417520
申请日：2006-05-04
CPC分类号： G11C29/52 , G11C16/04 , G11C16/10 , G11C16/3436 , G11C16/3445 , G11C16/3459 , G11C16/349 , G11C16/3495 , G11C2029/0409
摘要： A method and circuitry for checking the programming (P) and deletion (L) operations of memory cells (5) in a nonvolatile memory device (1). Parallel to the programming (P) or deletion (L) operations of the actual memory cells (5) the respective programming or deletion process is carried out on at least one similar checking cell (4.1, 4.2, 4.3), with the programming (P) or deletion (L) operations being less favorable by a defined extent than the programming (P) or deletion (L) operations of the actual memory cells (5). From the content of the checking cell (4.1, 4.2, 4.3) an evaluation device (6) determines whether the programming (P) or deletion (L) operation was successful or not, and a corresponding output signal (ak) indicative thereof is produced.
摘要翻译： 一种用于检查非易失性存储器件（1）中的存储器单元（5）的编程（P）和删除（L）操作的方法和电路。 与实际存储单元（5）的编程（P）或删除（L）操作并行，在至少一个类似的校验单元（4.1,4.2,4.3）上进行相应的编程或删除处理，其中编程（P ）或删除（L）操作比实际存储器单元（5）的编程（P）或删除（L）操作更不利于定义的程度。 从检查单元（4.1,4.2,4.3）的内容，评价装置（6）判断编程（P）或删除（L）的操作是否成功，并且生成表示其的对应的输出信号（ak） 。
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4.发明申请Nonvolatile memory device comprising a programming and deletion checking option 有权包括编程和删除检查选项的非易失性存储器件公开(公告)号：US20070260946A1
公开(公告)日：2007-11-08
申请号：US11417520
申请日：2006-05-04
IPC分类号： G11C29/00
CPC分类号： G11C29/52 , G11C16/04 , G11C16/10 , G11C16/3436 , G11C16/3445 , G11C16/3459 , G11C16/349 , G11C16/3495 , G11C2029/0409
摘要： A method and circuitry for checking the programming (P) and deletion (L) operations of memory cells (5) in a nonvolatile memory device (1). Parallel to the programming (P) or deletion (L) operations of the actual memory cells (5) the respective programming or deletion process is carried out on at least one similar checking cell (4.1, 4.2, 4.3), with the programming (P) or deletion (L) operations being less favorable by a defined extent than the programming (P) or deletion (L) operations of the actual memory cells (5). From the content of the checking cell (4.1, 4.2, 4.3) an evaluation device (6) determines whether the programming (P) or deletion (L) operation was successful or not, and a corresponding output signal (ak) indicative thereof is produced.
摘要翻译： 一种用于检查非易失性存储器件（1）中的存储器单元（5）的编程（P）和删除（L）操作的方法和电路。 与实际存储单元（5）的编程（P）或删除（L）操作并行，在至少一个类似的校验单元（4.1,4.2,4.3）上进行相应的编程或删除处理，其中编程（P ）或删除（L）操作比实际存储器单元（5）的编程（P）或删除（L）操作更不利于定义的程度。 从检查单元（4.1,4.2,4.3）的内容，评价装置（6）判断编程（P）或删除（L）的操作是否成功，并且生成表示其的对应的输出信号（ak） 。
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