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    Joint time/frequency domain maximum ratio combining architectures for multi input multi output wireless receivers
    2.
    发明授权
    Joint time/frequency domain maximum ratio combining architectures for multi input multi output wireless receivers 有权
    多输入多输出无线接收器的联合时间/频域最大比组合架构

    公开(公告)号：US07486751B1

    公开(公告)日：2009-02-03

    申请号：US11048075

    申请日：2005-01-31

    Applicant: Thomas Edward Pare, Jr. ,  Shuling Feng ,  Chien-Cheng Tung

    Inventor： Thomas Edward Pare, Jr. ,  Shuling Feng ,  Chien-Cheng Tung

    IPC: H04B7/10

    CPC classification number: H04L25/03159 ,  H04B7/0413 ,  H04B7/0857 ,  H04L25/0204 ,  H04L25/03343 ,  H04L27/2655 ,  H04L27/2662 ,  H04L2025/03414 ,  H04L2025/03522

    Abstract: A multi input multi output (MIMO) receiver for receiving signals having a synchronization (SYNC) module being responsive to a plurality of received baseband signals for processing the same to generate maximum ratio combining (MRC) parameters, complementary code keying (CCK) modulated signals and orthogonal frequency division multiplexing (OFDM) modulated signals, said SYNC module for using said MRC parameters to process said OFDM modulated signals to generate a plurality of aligned OFDM signals in time domain, said MIMO receiver for processing said plurality of aligned OFDM signals to generate a plurality of subcarriers, in accordance with an embodiment of the present invention. The MIMO receiver further including a time domain CCK MRC module being responsive to said MRC parameters for processing said CCK modulated signals in time domain to generate aligned signals, said aligned signals being combined to generate an adjusted signal for demodulation. The MIMO receiver further including a frequency domain OFDM MRC module being responsive to said plurality of said subcarriers for combining the same in the frequency domain to generate an equalized response for demodulation, wherein said MIMO receiver for processing said CCK modulated signals in the time domain and said OFDM modulated signals in the frequency domain to improve the reception of said plurality of received baseband signals.

    Abstract translation: 一种多输入多输出（MIMO）接收机，用于接收具有同步（SYNC）模块的信号，该同步（SYNC）模块响应于多个接收的基带信号进行处理，以产生最大比率组合（MRC）参数，互补码键控（CCK）调制信号 和正交频分复用（OFDM）调制信号，所述SYNC模块用于使用所述MRC参数来处理所述OFDM调制信号以在时域中产生多个对准的OFDM信号，所述MIMO接收机用于处理所述多个对准的OFDM信号以产生 多个子载波，根据本发明的实施例。 所述MIMO接收机还包括响应于所述MRC参数的时域CCK MRC模块，用于在时域中处理所述CCK调制信号以生成对准的信号，所述对准的信号被组合以产生用于解调的经调整的信号。 MIMO接收机还包括响应于所述多个所述子载波的频域OFDM MRC模块，用于在频域中组合它们以产生用于解调的均衡响应，其中所述MIMO接收机用于在时域中处理所述CCK调制信号，以及 所述OFDM调制信号在频域中以改善所述多个接收的基带信号的接收。

    Efficient soft decision demapper to minimize viterbi decoder complexity
    3.
    发明授权
    Efficient soft decision demapper to minimize viterbi decoder complexity 有权
    高效的软判决解映射器，以最小化维特比解码器的复杂度

    公开(公告)号：US07313750B1

    公开(公告)日：2007-12-25

    申请号：US10912996

    申请日：2004-08-05

    Applicant: Shuling Feng ,  Chien-Cheng Tung

    Inventor： Shuling Feng ,  Chien-Cheng Tung

    IPC: H03M13/03 ,  H03D1/00

    CPC classification number: H03M13/41 ,  H03M13/6325 ,  H03M13/6527 ,  H04L1/0054 ,  H04L1/0068 ,  H04L1/0071 ,  H04L25/03197 ,  H04L25/067 ,  H04L27/2647 ,  H04L27/38 ,  H04L2025/03414 ,  H04L2025/0342

    Abstract: A receiver system that receives signals and has a demapper device that is responsive to an equalizer output and generates a demapper output including one or more bit metrics. The receiver system also generates equalizer output, and the demapper uses distance measure to calculate bit metrics. The receiver system uses demapper output to generate a processed output. The receiver system further includes a convolutional decoder which is responsive to the processed output, and subsequently generates a decoded bit sequence, as well as uses the processed output to generate one or more path metrics. The convolutional decoder uses bit metrics and path metrics to the decode processed output, to generate a decoded bit sequence. The receiver system uses the distance measure to reduce the size of the bit metrics and the size of the path metrics to improve the performance of said convolutional decoder.

    Abstract translation: 接收机系统，其接收信号并具有响应于均衡器输出的解映射器装置，并产生包括一个或多个比特量度的解映射器输出。 接收机系统还产生均衡器输出，并且解映射器使用距离测量来计算比特度量。 接收机系统使用解映射器输出来产生处理后的输出。 接收机系统还包括卷积解码器，其响应于经处理的输出，并且随后生成解码比特序列，并且使用经处理的输出来生成一个或多个路径度量。 卷积解码器使用比特度量和路径度量来解码处理的输出，以产生解码比特序列。 接收机系统使用距离测量来减小比特度量的大小和路径量度的大小以提高所述卷积解码器的性能。

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