公开(公告)号：US09227093B2

公开(公告)日：2016-01-05

申请号：US13981122

申请日：2012-01-25

申请人： Timothy Bissett ,  David Nash ,  Richard Beale

发明人： Timothy Bissett ,  David Nash ,  Richard Beale

IPC分类号： A62B35/00 ,  A62B35/04

CPC分类号： A62B35/0068 ,  A62B35/04 ,  F16B45/04

摘要： An anchor arrangement for a safety line system is for use with a bracket to secure to a structure for mounting the safety line. The anchor arrangement either includes an alignment collar arranged to seat in a seat provided on the bracket, the alignment collar being able to seat in a plurality of different orientations with respect to the bracket; a resilient biasing means acting between the bracket and a reaction member provided as part of the anchor arrangement or a tension indicator for the safety line, which has a part of the bracket aligned adjacent and indicia zone on the anchor arrangement.

摘要翻译： 用于安全线系统的锚定装置用于支架以固定到用于安装安全线的结构。 所述锚定装置还包括布置成位于设置在所述支架上的座中的对准轴环，所述对准轴环能够相对于所述支架以多个不同的方向安置; 作用在支架和作为锚定装置的一部分提供的反作用构件之间的弹性偏置装置或用于安全线的张力指示器，其具有支架的一部分在锚定装置上对准相邻和标记区域。

公开(公告)号：US20130299646A1

公开(公告)日：2013-11-14

申请号：US13981122

申请日：2012-01-25

申请人： Timothy Bissett ,  David Nash ,  Richard Beale

发明人： Timothy Bissett ,  David Nash ,  Richard Beale

IPC分类号： A62B35/00

CPC分类号： A62B35/0068 ,  A62B35/04 ,  F16B45/04

摘要： An anchor arrangement for a safety line system is for use with a bracket to secure to a structure for mounting the safety line. The anchor arrangement either includes an alignment collar arranged to seat in a seat provided on the bracket, the alignment collar being able to seat in a plurality of different orientations with respect to the bracket; a resilient biasing means acting between the bracket and a reaction member provided as part of the anchor arrangement or a tension indicator for the safety line, which has a part of the bracket aligned adjacent and indicia zone on the anchor arrangement.

摘要翻译： 用于安全线系统的锚定装置用于支架以固定到用于安装安全线的结构。 所述锚定装置还包括布置成位于设置在所述支架上的座中的对准轴环，所述对准轴环能够相对于所述支架以多个不同的方向安置; 作用在支架和作为锚定装置的一部分提供的反作用构件之间的弹性偏置装置或用于安全线的张力指示器，其具有支架的一部分在锚定装置上对准相邻和标记区域。

公开(公告)号：US08154358B2

公开(公告)日：2012-04-10

申请号：US12729000

申请日：2010-03-22

申请人： Richard Beale ,  John Khoury

发明人： Richard Beale ,  John Khoury

IPC分类号： H03F3/38 ,  H03K7/08

CPC分类号： H03K7/08 ,  H03F1/26 ,  H03F3/2173 ,  H03K11/00

摘要： In a particular embodiment, a circuit device includes a pulse edge control circuit to receive at least one pulse-width modulated (PWM) signal from a PWM source. The pulse edge control circuit is adapted to selectively invert and swap the at least one PWM signal with a logic-inverted duty-cycle complement of the at least one PWM signal at discrete time intervals to produce at least one modulated PWM signal having a changed power spectrum. The pulse edge control circuit provides the at least one modulated PWM signal to at least one output of the pulse edge control circuit.

摘要翻译： 在特定实施例中，电路装置包括脉冲边缘控制电路，以从PWM源接收至少一个脉冲宽度调制（PWM）信号。 脉冲沿控制电路适于以离散时间间隔以至少一个PWM信号的逻辑反相占空比补码选择性地反转和交换至少一个PWM信号，以产生具有改变的功率的至少一个调制的PWM信号 光谱。 脉冲沿控制电路将至少一个调制的PWM信号提供给脉冲沿控制电路的至少一个输出端。

公开(公告)号：US20110298505A1

公开(公告)日：2011-12-08

申请号：US12795608

申请日：2010-06-07

申请人： John M. Khoury ,  Eduardo Viegas ,  Richard Beale

发明人： John M. Khoury ,  Eduardo Viegas ,  Richard Beale

IPC分类号： H03L7/06

CPC分类号： H03L7/0818

摘要： In an embodiment, a circuit includes a buffer circuit including a buffer input and an output terminal and a latency locked loop (LLL) circuit. The LLL circuit includes a signal input for receiving an input signal, a feedback input coupled to the output terminal, and a signal output coupled to the buffer input. The LLL circuit is configured to control a propagation delay between the signal input and the signal output to produce a substantially constant total delay from the signal input to the output terminal.

摘要翻译： 在一个实施例中，电路包括缓冲器电路，其包括缓冲器输入端和输出端子以及等待时间锁定环路（LLL）电路。 LLL电路包括用于接收输入信号的信号输入，耦合到输出端的反馈输入和耦合到缓冲器输入的信号输出。 LLL电路被配置为控制信号输入和信号输出之间的传播延迟，以从信号输入到输出端产生基本恒定的总延迟。

公开(公告)号：US08433028B2

公开(公告)日：2013-04-30

申请号：US12795608

申请日：2010-06-07

申请人： John M. Khoury ,  Eduardo Viegas ,  Richard Beale

发明人： John M. Khoury ,  Eduardo Viegas ,  Richard Beale

IPC分类号： H03D3/24

CPC分类号： H03L7/0818

摘要： In an embodiment, a circuit includes a buffer circuit including a buffer input and an output terminal and a latency locked loop (LLL) circuit. The LLL circuit includes a signal input for receiving an input signal, a feedback input coupled to the output terminal, and a signal output coupled to the buffer input. The LLL circuit is configured to control a propagation delay between the signal input and the signal output to produce a substantially constant total delay from the signal input to the output terminal.

摘要翻译： 在一个实施例中，电路包括缓冲器电路，其包括缓冲器输入端和输出端子以及等待时间锁定环路（LLL）电路。 LLL电路包括用于接收输入信号的信号输入，耦合到输出端的反馈输入和耦合到缓冲器输入的信号输出。 LLL电路被配置为控制信号输入和信号输出之间的传播延迟，以从信号输入到输出端产生基本恒定的总延迟。

公开(公告)号：US08188804B2

公开(公告)日：2012-05-29

申请号：US12767605

申请日：2010-04-26

申请人： Jeffrey Alderson ,  John Khoury ,  Richard Beale

发明人： Jeffrey Alderson ,  John Khoury ,  Richard Beale

IPC分类号： H03F3/38 ,  H03K7/08

CPC分类号： H03K7/08

摘要： In a particular embodiment, a circuit device is disclosed that includes a data generator adapted to output a random pulse sequence having a particular spectral shape. The circuit device further includes a pulse edge control circuit to selectively apply a carrier suppression operation to at least one pulse-width modulated (PWM) signal in response to the random pulse sequence to produce at least one modulated PWM output signal. The spectral energy associated with a PWM carrier of the modulated PWM output signal at a carrier frequency and associated harmonics is changed such that the modulated PWM output signal has a spectral shape defined by the particular spectral shape.

摘要翻译： 在特定实施例中，公开了一种电路装置，其包括适于输出具有特定光谱形状的随机脉冲序列的数据发生器。 电路装置还包括脉冲边缘控制电路，用于响应于随机脉冲序列选择性地对至少一个脉冲宽度调制（PWM）信号施加载波抑制操作，以产生至少一个调制的PWM输出信号。 与载波频率和相关谐波的调制PWM输出信号的PWM载波相关联的频谱能量被改变，使得调制的PWM输出信号具有由特定光谱形状限定的光谱形状。

公开(公告)号：US07791521B2

公开(公告)日：2010-09-07

申请号：US12198457

申请日：2008-08-26

申请人： John Khoury ,  Richard Beale

发明人： John Khoury ,  Richard Beale

IPC分类号： H03M1/82

CPC分类号： H03K7/08 ,  H03F1/26 ,  H03F3/217 ,  H04B15/02 ,  H04B2215/067

摘要： In a particular embodiment, a circuit device includes a pulse edge control circuit to receive at least one pulse-width modulated (PWM) signal from a PWM source. The pulse edge control circuit is adapted to selectively apply a phase shift operation to the at least one PWM signal at integer submultiples of a frame repetition rate to produce at least one modulated PWM signal having a changed power spectrum. The pulse edge control circuit provides the at least one modulated PWM signal to at least one output of the pulse edge control circuit.

摘要翻译： 在特定实施例中，电路装置包括脉冲边缘控制电路，以从PWM源接收至少一个脉冲宽度调制（PWM）信号。 脉冲沿控制电路适于以帧重复频率的整数倍数选择性地对至少一个PWM信号施加相移操作，以产生具有改变的功率谱的至少一个调制的PWM信号。 脉冲沿控制电路将至少一个调制的PWM信号提供给脉冲沿控制电路的至少一个输出端。

公开(公告)号：US07701307B2

公开(公告)日：2010-04-20

申请号：US12187873

申请日：2008-08-07

申请人： Richard Beale ,  John Khoury

发明人： Richard Beale ,  John Khoury

IPC分类号： H03F3/38 ,  H03K7/08

CPC分类号： H03K7/08 ,  H03F1/26 ,  H03F3/2173 ,  H03K11/00

摘要： In a particular embodiment, a circuit device includes a pulse edge control circuit to receive at least one pulse-width modulated (PWM) signal from a PWM source. The pulse edge control circuit is adapted to selectively invert and swap the at least one PWM signal with a logic-inverted duty-cycle complement of the at least one PWM signal at discrete time intervals to produce at least one modulated PWM signal having a changed power spectrum. The pulse edge control circuit provides the at least one modulated PWM signal to at least one output of the pulse edge control circuit.

摘要翻译： 在特定实施例中，电路装置包括脉冲边缘控制电路，以从PWM源接收至少一个脉冲宽度调制（PWM）信号。 脉冲沿控制电路适于以离散时间间隔以至少一个PWM信号的逻辑反相占空比补码选择性地反转和交换至少一个PWM信号，以产生具有改变的功率的至少一个调制的PWM信号 光谱。 脉冲沿控制电路将至少一个调制的PWM信号提供给脉冲沿控制电路的至少一个输出端。