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1.发明授权公开(公告)号：US08314001B2
公开(公告)日：2012-11-20
申请号：US12757145
申请日：2010-04-09
申请人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
发明人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
IPC分类号： H01L21/336
CPC分类号： H01L27/092 , H01L21/743 , H01L21/84 , H01L27/0688 , H01L27/1203
摘要： Vertically stacked Field Effect Transistors (FETs) are created where a first FET and a second FET are controllable independently. The vertically stacked FETs may be connected in series or in parallel, thereby suitable for use as a portion of a NAND circuit or a NOR circuit. Epitaxial growth over a source and drain of a first FET, and having similar doping to the source and drain of the first FET provide a source and drain of a second FET. An additional epitaxial growth of a type opposite the doping of the source and drain of the first FET provides a body for the second FET.
摘要翻译： 产生垂直堆叠场效应晶体管（FET），其中第一FET和第二FET独立控制。 垂直堆叠的FET可以串联或并联连接，从而适合用作NAND电路或NOR电路的一部分。 在第一FET的源极和漏极上的外延生长，并且具有与第一FET的源极和漏极类似的掺杂，提供第二FET的源极和漏极。 与第一FET的源极和漏极的掺杂相反的类型的另外的外延生长为第二FET提供了一个主体。
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2.发明授权公开(公告)号：US08754417B2
公开(公告)日：2014-06-17
申请号：US13608059
申请日：2012-09-10
申请人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
发明人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
IPC分类号： H01L29/10 , H01L29/76 , H01L31/036 , H01L31/112
CPC分类号： H01L27/092 , H01L21/743 , H01L21/84 , H01L27/0688 , H01L27/1203
摘要： Vertically stacked Field Effect Transistors (FETs) are created where a first FET and a second FET are controllable independently. The vertically stacked FETs may be connected in series or in parallel, thereby suitable for use as a portion of a NAND circuit or a NOR circuit. Epitaxial growth over a source and drain of a first FET, and having similar doping to the source and drain of the first FET provide a source and drain of a second FET. An additional epitaxial growth of a type opposite the doping of the source and drain of the first FET provides a body for the second FET.
摘要翻译： 产生垂直堆叠场效应晶体管（FET），其中第一FET和第二FET独立控制。 垂直堆叠的FET可以串联或并联连接，从而适合用作NAND电路或NOR电路的一部分。 在第一FET的源极和漏极上的外延生长，并且具有与第一FET的源极和漏极类似的掺杂，提供第二FET的源极和漏极。 与第一FET的源极和漏极的掺杂相反的类型的另外的外延生长为第二FET提供了一个主体。
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3.发明申请公开(公告)号：US20110248349A1
公开(公告)日：2011-10-13
申请号：US12757145
申请日：2010-04-09
申请人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
发明人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L27/092 , H01L21/743 , H01L21/84 , H01L27/0688 , H01L27/1203
摘要： Vertically stacked Field Effect Transistors (FETs) are created where a first FET and a second FET are controllable independently. The vertically stacked FETs may be connected in series or in parallel, thereby suitable for use as a portion of a NAND circuit or a NOR circuit. Epitaxial growth over a source and drain of a first FET, and having similar doping to the source and drain of the first FET provide a source and drain of a second FET. An additional epitaxial growth of a type opposite the doping of the source and drain of the first FET provides a body for the second FET.
摘要翻译： 产生垂直堆叠场效应晶体管（FET），其中第一FET和第二FET独立控制。 垂直堆叠的FET可以串联或并联连接，从而适合用作NAND电路或NOR电路的一部分。 在第一FET的源极和漏极上的外延生长，并且具有与第一FET的源极和漏极类似的掺杂，提供第二FET的源极和漏极。 与第一FET的源极和漏极的掺杂相反的类型的另外的外延生长为第二FET提供了一个主体。
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4.发明申请公开(公告)号：US20130001701A1
公开(公告)日：2013-01-03
申请号：US13608059
申请日：2012-09-10
申请人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
发明人： Todd Alan Christensen , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
IPC分类号： H01L27/092
CPC分类号： H01L27/092 , H01L21/743 , H01L21/84 , H01L27/0688 , H01L27/1203
摘要： Vertically stacked Field Effect Transistors (FETs) are created where a first FET and a second FET are controllable independently. The vertically stacked FETs may be connected in series or in parallel, thereby suitable for use as a portion of a NAND circuit or a NOR circuit. Epitaxial growth over a source and drain of a first FET, and having similar doping to the source and drain of the first FET provide a source and drain of a second FET. An additional epitaxial growth of a type opposite the doping of the source and drain of the first FET provides a body for the second FET.
摘要翻译： 产生垂直堆叠场效应晶体管（FET），其中第一FET和第二FET独立控制。 垂直堆叠的FET可以串联或并联连接，从而适合用作NAND电路或NOR电路的一部分。 在第一FET的源极和漏极上的外延生长，并且具有与第一FET的源极和漏极类似的掺杂，提供第二FET的源极和漏极。 与第一FET的源极和漏极的掺杂相反的类型的另外的外延生长为第二FET提供了一个主体。
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5.发明授权公开(公告)号：US07915949B2
公开(公告)日：2011-03-29
申请号：US12403158
申请日：2009-03-12
申请人： Karl Robert Erickson , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
发明人： Karl Robert Erickson , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
摘要： A method and an eFuse programming circuit for implementing resistance determination of an eFuse before initiating eFuse blow, and a design structure on which the subject circuit resides are provided. An eFuse on a chip is used to set current flow through a known resistor and measure the eFuse resistance. An applied voltage to program selected eFuses on the chip is selected responsive to an identified eFuse voltage value.
摘要翻译： 一种用于在开始eFuse吹制之前实现eFuse的电阻确定的方法和eFuse编程电路，以及提供了该主题电路所在的设计结构。 芯片上的eFuse用于设置电流通过已知电阻并测量eFuse电阻。 响应于所识别的eFuse电压值来选择对芯片上的所选eFuse进行编程的施加电压。
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6.发明申请Implementing eFuse Resistance Determination Before Initiating eFuse Blow 失效启动eFuse Blow之前执行eFuse电阻测定公开(公告)号：US20100232248A1
公开(公告)日：2010-09-16
申请号：US12403158
申请日：2009-03-12
申请人： Karl Robert Erickson , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
发明人： Karl Robert Erickson , Phil Christopher Felice Paone , David Paul Paulsen , John Edward Sheets, II
IPC分类号： G11C17/16
摘要： A method and an eFuse programming circuit for implementing resistance determination of an eFuse before initiating eFuse blow, and a design structure on which the subject circuit resides are provided. An eFuse on a chip is used to set current flow through a known resistor and measure the eFuse resistance. An applied voltage to program selected eFuses on the chip is selected responsive to an identified eFuse voltage value.
摘要翻译： 一种用于在开始eFuse吹制之前实现eFuse的电阻确定的方法和eFuse编程电路，以及提供了该主题电路所在的设计结构。 芯片上的eFuse用于设置电流通过已知电阻并测量eFuse电阻。 响应于所识别的eFuse电压值来选择对芯片上的所选eFuse进行编程的施加电压。
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公开(公告)号：US08138054B2
公开(公告)日：2012-03-20
申请号：US12416264
申请日：2009-04-01
IPC分类号： H01L21/336
CPC分类号： H01L29/66575 , H01L29/1033 , H01L29/66628 , H01L29/66651 , H01L29/78
摘要： An enhanced FET capable of controlling current above and below a gate of the FET. The FET is formed on a semiconductor substrate. A source and drain are formed in the substrate (or in a well in the substrate). A first epitaxial layer of similar doping to the source and drain are grown on the source and drain, the first epitaxial layer is thicker than the gate, but not so thick as to cover the top of the gate. A second epitaxial layer of opposite doping is grown on the first epitaxial layer thick enough to cover the top of the gate. The portion of the second epitaxial layer above the gate serves as a body through which the gate controls current flow between portions of the first epitaxial layer over the drain and the source.
摘要翻译： 一种能够控制FET栅极上下电流的增强型FET。 FET形成在半导体衬底上。 源极和漏极形成在衬底（或衬底中的阱中）。 在源极和漏极上生长与源极和漏极类似的掺杂的第一外延层，第一外延层比栅极厚，但不如覆盖栅极的顶部那样厚。 在第一外延层上生长相当掺杂的第二外延层，其厚度足以覆盖栅极的顶部。 栅极上方的第二外延层的部分用作主体，栅极通过该主体控制在漏极和源极之间的第一外延层的部分之间的电流。
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公开(公告)号：US20100252868A1
公开(公告)日：2010-10-07
申请号：US12416264
申请日：2009-04-01
IPC分类号： H01L29/78 , H01L21/8234 , H01L21/336
CPC分类号： H01L29/66575 , H01L29/1033 , H01L29/66628 , H01L29/66651 , H01L29/78
摘要： An enhanced FET capable of controlling current above and below a gate of the FET. The FET is formed on a semiconductor substrate. A source and drain are formed in the substrate (or in a well in the substrate). A first epitaxial layer of similar doping to the source and drain are grown on the source and drain, the first epitaxial layer is thicker than the gate, but not so thick as to cover the top of the gate. A second epitaxial layer of opposite doping is grown on the first epitaxial layer thick enough to cover the top of the gate. The portion of the second epitaxial layer above the gate serves as a body through which the gate controls current flow between portions of the first epitaxial layer over the drain and the source.
摘要翻译： 一种能够控制FET栅极上下电流的增强型FET。 FET形成在半导体衬底上。 源极和漏极形成在衬底（或衬底中的阱中）。 在源极和漏极上生长与源极和漏极类似的掺杂的第一外延层，第一外延层比栅极厚，但不如覆盖栅极的顶部那样厚。 在第一外延层上生长相当掺杂的第二外延层，其厚度足以覆盖栅极的顶部。 栅极上方的第二外延层的部分用作主体，栅极通过该主体控制在漏极和源极之间的第一外延层的部分之间的电流。
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公开(公告)号：US08574982B2
公开(公告)日：2013-11-05
申请号：US12712521
申请日：2010-02-25
IPC分类号： H01L21/8249
CPC分类号： H01L27/10841 , H01L27/10808 , H01L27/10852 , H01L27/10873 , H01L28/40
摘要： A method and circuit for implementing an embedded dynamic random access memory (eDRAM), and a design structure on which the subject circuit resides are provided. The embedded dynamic random access memory (eDRAM) circuit includes a stacked field effect transistor (FET) and capacitor. The capacitor is fabricated directly on top of the FET to build the eDRAM.
摘要翻译： 一种用于实现嵌入式动态随机存取存储器（eDRAM）的方法和电路，以及设置有该电路所在的设计结构。 嵌入式动态随机存取存储器（eDRAM）电路包括堆叠场效应晶体管（FET）和电容器。 电容器直接在FET的顶部制造以构建eDRAM。
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公开(公告)号：US20110204428A1
公开(公告)日：2011-08-25
申请号：US12712521
申请日：2010-02-25
IPC分类号： H01L27/108 , H01L21/8242 , G06F17/50
CPC分类号： H01L27/10841 , H01L27/10808 , H01L27/10852 , H01L27/10873 , H01L28/40
摘要： A method and circuit for implementing an embedded dynamic random access memory (eDRAM), and a design structure on which the subject circuit resides are provided. The embedded dynamic random access memory (eDRAM) circuit includes a stacked field effect transistor (FET) and capacitor. The capacitor is fabricated directly on top of the FET to build the eDRAM.
摘要翻译： 一种用于实现嵌入式动态随机存取存储器（eDRAM）的方法和电路，以及设置有该电路所在的设计结构。 嵌入式动态随机存取存储器（eDRAM）电路包括堆叠场效应晶体管（FET）和电容器。 电容器直接在FET的顶部制造以构建eDRAM。
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