公开(公告)号：US20240242987A1

公开(公告)日：2024-07-18

申请号：US18620541

申请日：2024-03-28

Applicant: Tokyo Electron Limited

Inventor： Ivan MALEEV ,  Yaowu MA ,  Zheng YAN ,  Basanta BHADURI

IPC: H01L21/67 ,  G01K1/02 ,  G01K11/00

CPC classification number: H01L21/67248 ,  G01K1/026 ,  G01K11/00 ,  H01L21/67086

Abstract: Aspects of the disclosure provide a wet etch semiconductor-processing system, which can include a wet processing bath configured to be filled with a processing liquid and configured for one or more semiconductor samples to be placed vertically in parallel therein and immersed in the processing liquid, and a sensor optically coupled to one of the semiconductor samples. The sensor can be configured to form an illumination beam, collect bandgap photoluminescence (PL) light excited by the illumination beam onto a surface of the semiconductor sample at an illuminated spot, and measure spectral intensities of the bandgap PL light in a vicinity of a semiconductor bandgap wavelength of the semiconductor sample. The sensor can be arranged with respect to the wet processing bath such that the sensor directs the illumination beam onto the surface of the semiconductor sample at the illuminated spot and receives the bandgap PL light from the illuminated spot.

公开(公告)号：US20240418501A1

公开(公告)日：2024-12-19

申请号：US18501672

申请日：2023-11-03

Applicant: Tokyo Electron Limited

Inventor： Ivan MALEEV ,  Yan CHEN ,  Holger TUITJE ,  Basanta BHADURI ,  Ching Ling MENG ,  Da SONG ,  Xinkang TIAN

IPC: G01B11/06

Abstract: A method of film thickness measurement includes illuminating a top layer of a sample in a first region with a broadband illumination beam. The sample includes a substrate and a plurality of semiconductor structures formed between the substrate and the top layer. A first reflectivity spectrum of the sample is obtained in the first region. A first thickness of the top layer in the first region is determined by applying a top-layer model to the first reflectivity spectrum. The top-layer model is substantially unaffected by the plurality of semiconductor structures.

公开(公告)号：US20250112065A1

公开(公告)日：2025-04-03

申请号：US18478946

申请日：2023-09-29

Applicant: Tokyo Electron Limited

Inventor： Ivan MALEEV ,  Basanta BHADURI ,  Holger TUITJE ,  Mihail MIHAYLOV ,  Xinkang TIAN ,  Da SONG

IPC: H01L21/67 ,  G01N21/84 ,  H01L21/66

Abstract: A system includes a vacuum chamber having a wafer chuck therein and side windows slanted relative to the wafer chuck. A wafer stage is positioned below the wafer chuck and configured to rotate the wafer chuck and move the wafer chuck vertically. Illumination optics, including an illumination corrector lens, are configured to receive light and direct the light through an illumination vacuum window of the side windows to an optical spot on the wafer. Collection optics, including a collection corrector lens, are configured to receive the light from the optical spot through a collection vacuum window of the side windows and direct the light to a detector. A transfer module is configured to move the illumination optics and the collection optics parallel to the illumination vacuum window and the collection vacuum window respectively. The illumination corrector lens and the collection corrector lens are configured to reduce chromatic aberration.