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公开(公告)号：US20070152713A1
公开(公告)日：2007-07-05
申请号：US11549722
申请日：2006-10-16
IPC分类号： H03K19/20
CPC分类号： H03K19/18
摘要： A magnetic transistor circuit with the OR, NOR, NAND and AND functions has a first, a second, a third, a fourth magnetic transistor, and a routing line. These four magnetic transistors as ordinary transistors that can be turned on or turned off by the control of several metal devices respectively disposed around the magnetic transistors. The OR, NOR, NAND and AND logic functions of the binary system can be implemented by the control of these metal devices.
摘要翻译： 具有OR，NOR，NAND和AND功能的磁晶体管电路具有第一，第二，第三，第四磁性晶体管和布线线。 这四个磁性晶体管是通过分别设置在磁性晶体管周围的几个金属器件的控制而导通或截止的普通晶体管。 二进制系统的OR，NOR，NAND和AND逻辑功能可以通过这些金属器件的控制来实现。
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公开(公告)号：US20070086104A1
公开(公告)日：2007-04-19
申请号：US11549337
申请日：2006-10-13
CPC分类号： H03K19/18
摘要： A magnetic AND/NOR circuit has a first, a second, a third, and a fourth magnetic transistor. These four magnetic transistors as ordinary transistors that can be turned on or turned off by the control of several metal devices respectively disposed around the magnetic transistors. The ‘AND’ and ‘NOR’ logic functions of the binary system can be implemented by the control of these metal devices.
摘要翻译： 磁AND / NOR电路具有第一，第二，第三和第四磁性晶体管。 这四个磁性晶体管是通过分别设置在磁性晶体管周围的几个金属器件的控制而导通或截止的普通晶体管。 二进制系统的“AND”和“NOR”逻辑功能可以通过这些金属器件的控制来实现。
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公开(公告)号：US20070058423A1
公开(公告)日：2007-03-15
申请号：US11223159
申请日：2005-09-09
申请人： Tom Agan , James Lai , Chien-Chiang Chan
发明人： Tom Agan , James Lai , Chien-Chiang Chan
IPC分类号： G11C11/00
CPC分类号： G11C11/16
摘要： An upside-down MRAM comprises a sense transistor and a plurality of sense lines. A first end of the sense transistor is electrically connected to a low voltage. The sense lines are electrically connected in parallel between a high voltage and a second end of the sense transistor. Each of the sense lines has a control logic and at least one memory bit, and the memory bit is connected in series between the high voltage and the control logic.
摘要翻译： 颠倒MRAM包括感测晶体管和多条感测线。 感测晶体管的第一端电连接到低电压。 感测线在感测晶体管的高电压和第二端之间并联电连接。 每个感测线路具有控制逻辑和至少一个存储器位，并且存储器位串联连接在高电压和控制逻辑之间。
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公开(公告)号：US20070153568A1
公开(公告)日：2007-07-05
申请号：US11549719
申请日：2006-10-16
IPC分类号： G11C11/00
摘要： A magnetic transistor circuit with the AND, NAND, NOR and OR functions has a first, a second, a third, a fourth magnetic transistor, and a routing line. These four magnetic transistors as ordinary transistors that can be turned on or turned off by the control of several metal devices respectively disposed around the magnetic transistors. The AND, NAND, NOR and OR logic functions of the binary system can be implemented by the control of these metal devices.
摘要翻译： 具有AND，NAND，NOR和OR功能的磁晶体管电路具有第一，第二，第三，第四磁性晶体管和布线。 这四个磁性晶体管是通过分别设置在磁性晶体管周围的几个金属器件的控制而导通或截止的普通晶体管。 二进制系统的AND，NAND，NOR和OR逻辑功能可以通过这些金属器件的控制来实现。
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公开(公告)号：US20070152254A1
公开(公告)日：2007-07-05
申请号：US11539284
申请日：2006-10-06
IPC分类号： H01L29/94
CPC分类号： H01F10/325 , B82Y25/00 , H01F10/3268 , H01L43/08
摘要： A magnetic transistor includes a first magnetic section, a second magnetic section, a conductive section, a first metal terminal, and a second metal terminal. The conductive section is disposed between and is in direct contact with both the first and second magnetic section. The first metal terminal is disposed on one end of an opposite surface to the conductive section of the first magnetic section. The second metal terminal is disposed on one end approximately diagonal to the first metal terminal on an opposite surface to the conductive section of the second magnetic section. While the magnetic transistor structure is turned on, a current flows through the first magnetic section and the second magnetic section via the conductive section.
摘要翻译： 磁性晶体管包括第一磁性部分，第二磁性部分，导电部分，第一金属端子和第二金属端子。 导电部分设置在第一和第二磁性部分之间并且与第一和第二磁性部分直接接触。 第一金属端子设置在与第一磁性部分的导电部分相反的表面的一端。 第二金属端子设置在与第二磁性部分的导电部分相反的表面上与第一金属端子大致对角的一端上。 当磁晶体管结构导通时，电流经由导电部分流过第一磁性部分和第二磁性部分。
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6.发明申请Method for Reducing Word Line Current in Magnetoresistive Random Access Memory and Structure Thereof 失效降低磁阻随机存取存储器及其结构中字线电流的方法公开(公告)号：US20070086233A1
公开(公告)日：2007-04-19
申请号：US11539296
申请日：2006-10-06
IPC分类号： G11C11/00
CPC分类号： G11C11/15
摘要： The method for reducing word line currents in magnetoresistive random access memory (MRAM) includes disposing the MRAM bit between a pair of word lines according to a magnetic field strength is increased when a distance between a magnetic section and its corresponding word line is decreased.
摘要翻译： 降低磁阻随机存取存储器（MRAM）中的字线电流的方法包括当磁区与其对应的字线之间的距离减小时，根据磁场强度将MRAM位置于一对字线之间。
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公开(公告)号：US20070164382A1
公开(公告)日：2007-07-19
申请号：US11549726
申请日：2006-10-16
CPC分类号： H01L43/08 , Y10T428/32
摘要： A magnetic transistor includes a magnetic section, a thin semiconductor layer, a first metal terminal, a second metal terminal, and a third metal terminal. The thin semiconductor layer is disposed on the magnetic section. The first metal terminal is disposed on one end of the magnetic section, acting as a gate of the magnetic transistor and capable of providing a conductive channel in the thin semiconductor layer. The second metal terminal and the third metal terminal are disposed respectively on one end and the other end of the thin semiconductor layer, capable of creating a conductive region. While the magnetic transistor is turned on, a current path is formed between the second metal terminal and the third metal terminal via the thin semiconductor layer.
摘要翻译： 磁性晶体管包括磁性部分，薄的半导体层，第一金属端子，第二金属端子和第三金属端子。 薄半导体层设置在磁性部分上。 第一金属端子设置在磁性部分的一端，用作磁性晶体管的栅极，并且能够在薄的半导体层中提供导电沟道。 第二金属端子和第三金属端子分别设置在能够产生导电区域的薄半导体层的一端和另一端上。 当磁晶体管导通时，经由薄半导体层在第二金属端子和第三金属端子之间形成电流路径。
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公开(公告)号：US20070103196A1
公开(公告)日：2007-05-10
申请号：US11549257
申请日：2006-10-13
IPC分类号： H03K19/21
摘要： A magnetic transistor circuit has a first and a second magnetic transistor. These two magnetic transistors that work as the ordinary transistors can be turned on or turned off by the control of several metal devices respectively disposed around the magnetic transistors. The EXOR logic function of the binary system can be implemented by the control of these metal devices.
摘要翻译： 磁性晶体管电路具有第一和第二磁性晶体管。 作为普通晶体管工作的这两个磁性晶体管可以通过分别设置在磁性晶体管周围的多个金属器件的控制而导通或截止。 二进制系统的EXOR逻辑功能可以通过这些金属器件的控制来实现。
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9.发明申请Magnetic Transistor Circuit Representing the Data '1' and '0' of the Binary System 失效磁性晶体管电路表示二进制系统的数据'1'和'0'公开(公告)号：US20070097588A1
公开(公告)日：2007-05-03
申请号：US11549272
申请日：2006-10-13
IPC分类号： H01H47/00
摘要： A magnetic transistor circuit representing the data ‘1’ and ‘0’ of the binary system comprises a routing line and a magnetic transistor unit. The routing line has a current going through with a first current direction or a second current direction, wherein the first current direction and the second current direction are opposite to represent the data ‘1’ and the data ‘0’ respectively. The magnetic transistor unit couples to the routing line at an output end to control the direction of the current going through the routing line.
摘要翻译： 表示二进制系统的数据“1”和“0”的磁性晶体管电路包括路由线路和磁性晶体管单元。 路由线具有通过第一电流方向或第二电流方向的电流，其中第一电流方向和第二电流方向相反，分别表示数据'1'和数据'0'。 磁性晶体管单元在输出端耦合到路由线以控制通过路由线路的电流的方向。
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公开(公告)号：US20070086234A1
公开(公告)日：2007-04-19
申请号：US11549247
申请日：2006-10-13
IPC分类号： G11C11/00
CPC分类号： G11C11/15
摘要： A magnetic memory has a first, a second and a third magnetic transistor. The first magnetic transistor has a first magnetic section and a second magnetic section, wherein the first magnetic section couples to a high voltage end. The second magnetic transistor has a third magnetic section and a fourth magnetic section, wherein the third magnetic section couples to a low voltage end, and the fourth magnetic section couples to the second magnetic section of the first magnetic transistor. The third magnetic transistor has a fifth magnetic section and a sixth magnetic section, wherein the fifth magnetic section couples with the second magnetic section and the fourth magnetic section together, and the sixth magnetic section couples to an input/output end.
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