公开(公告)号：US07141458B2

公开(公告)日：2006-11-28

申请号：US11041971

申请日：2005-01-26

Applicant: Tomohiro Okamura

Inventor： Tomohiro Okamura

IPC: H01L21/84

CPC classification number: H01L27/1203 ,  H01L21/28123 ,  H01L21/84 ,  H01L29/66628 ,  H01L29/7834

Abstract: A method of manufacturing a semiconductor device includes a step of forming a device region 5 that is separated by a device-separation insulating film 4 formed in a part of an SOI layer, a step of forming a gate insulating film 6a on a device region 5 so that the device region 5 can be exposed on both sides of the gate insulating film 6a, a step of forming a gate electrode 7a with polysilicon on the gate insulating film 6a, a step of adjusting the area of exposed silicon so that the area of exposed silicon can be a prescribed area by forming at least either a pseudo region 5b or a pseudo electrode 7b to control the growth rate in growing an epitaxial layer 9, and a step of conducting low-temperature epitaxial growth of silicon.

Abstract translation: 一种制造半导体器件的方法包括形成由在SOI层的一部分上形成的器件分离绝缘膜4分离的器件区域5的步骤，在器件区域上形成栅极绝缘膜6a的步骤 5，使得器件区域5可以暴露在栅极绝缘膜6a的两侧，在栅极绝缘膜6a上形成具有多晶硅的栅电极7a的步骤，调整暴露的硅的面积的步骤 暴露的硅的面积可以通过形成伪区域bb或假电极7b中的至少一个来控​​制生长外延层9的生长速度而成为规定区域，以及进行低温外延生长的步骤 硅。

公开(公告)号：US07118978B2

公开(公告)日：2006-10-10

申请号：US10989024

申请日：2004-11-16

Applicant: Tomohiro Okamura

Inventor： Tomohiro Okamura

IPC: H01L21/336

CPC classification number: H01L29/66772

Abstract: A method for producing a semiconductor device with an SOI substrate having a support substrate 1 and a semiconductor layer 3 that interpose a first insulating film 2 between them includes the following steps. An element region and an element-separation region 4 are formed in the semiconductor layer 3. A gate insulating film 5 is formed on the semiconductor layer 3. A gate electrode 6 is formed on the gate insulating film 5. A second insulating film 7 is formed. The gate insulating film 5 is removed. First thickness adjustment is performed. Ion implantation introducing low concentration impurities is performed on the thickness-adjusted semiconductor layers 3 and 8. A first sidewall portion 7a is formed on the side surfaces of the gate electrode 6. A second sidewall portion 10a is formed on the side surfaces of the first sidewall portion 7a.

Abstract translation: 一种具有SOI衬底的半导体器件的制造方法，所述SOI衬底具有支撑衬底1和在其间插入第一绝缘膜2的半导体层3，其包括以下步骤。 在半导体层3中形成元件区域和元件分离区域4。 在半导体层3上形成栅绝缘膜5。 在栅极绝缘膜5上形成栅电极6。 形成第二绝缘膜7。 去除栅极绝缘膜5。 进行第一厚度调整。 在厚度调整的半导体层3和8上进行引入低浓度杂质的离子注入。 第一侧壁部分7a形成在栅电极6的侧表面上。 第二侧壁部分10a形成在第一侧壁部分7a的侧表面上。

公开(公告)号：US20110117741A1

公开(公告)日：2011-05-19

申请号：US12926123

申请日：2010-10-27

Applicant: Tomohiro Okamura ,  Masao Okihara

Inventor： Tomohiro Okamura ,  Masao Okihara

IPC: H01L21/302

CPC classification number: H01L21/76256

Abstract: There is provided a method of fabricating an SOI wafer, the method including: a) preparing a bonded SOI substrate that has a buried oxide layer and an SOI layer formed in this sequence on a circular plate shaped support, and at a peripheral edge portion of the support substrate, has a silicon island region in which the SOI layer is not well formed with scattered defective silicon layer; b) etching a silicon island region defective silicon layer to remove the defective silicon layer scattered in the silicon island region by dry etching; and c) etching a silicon island region buried oxide layer to remove the buried oxide layer in the silicon island region by wet etching.

Abstract translation: 提供一种制造SOI晶片的方法，该方法包括：a）制备具有掩埋氧化物层和以此顺序形成的SOI层的键合SOI衬底在圆形板状支撑体上，并在其周边部分 支撑基板具有硅层，其中SOI层不是很好地形成有散射的有缺陷的硅层; b）蚀刻硅岛区域不良硅层，以通过干蚀刻去除在硅岛区域中散布的有缺陷的硅层; 以及c）蚀刻硅岛区掩埋氧化物层，以通过湿蚀刻去除硅岛区域中的掩埋氧化物层。

公开(公告)号：US20050189590A1

公开(公告)日：2005-09-01

申请号：US11041971

申请日：2005-01-26

Applicant: Tomohiro Okamura

Inventor： Tomohiro Okamura

IPC: H01L29/786 ,  H01L21/28 ,  H01L21/336 ,  H01L21/84 ,  H01L27/108 ,  H01L27/12 ,  H01L29/78

CPC classification number: H01L27/1203 ,  H01L21/28123 ,  H01L21/84 ,  H01L29/66628 ,  H01L29/7834

Abstract: A method of manufacturing a semiconductor device includes a step of forming a device region 5 that is separated by a device-separation insulating film 4 formed in a part of an SOI layer, a step of forming a gate insulating film 6a on a device region 5 so that the device region 5 can be exposed on both sides of the gate insulating film 6a, a step of forming a gate electrode 7a with polysilicon on the gate insulating film 6a, a step of adjusting the area of exposed silicon so that the area of exposed silicon can be a prescribed area by forming at least either a pseudo region 5b or a pseudo electrode 7b to control the growth rate in growing an epitaxial layer 9, and a step of conducting low-temperature epitaxial growth of silicon.

Abstract translation: 一种制造半导体器件的方法包括形成由在SOI层的一部分上形成的器件分离绝缘膜4分离的器件区域5的步骤，在器件区域上形成栅极绝缘膜6a的步骤 5，使得器件区域5可以暴露在栅极绝缘膜6a的两侧，在栅极绝缘膜6a上形成具有多晶硅的栅电极7a的步骤，调整暴露的硅的面积的步骤 暴露的硅的面积可以通过形成伪区域bb或假电极7b中的至少一个来控​​制生长外延层9的生长速度而成为规定区域，以及进行低温外延生长的步骤 硅。

公开(公告)号：US07790568B2

公开(公告)日：2010-09-07

申请号：US11511277

申请日：2006-08-29

Applicant: Tomohiro Okamura

Inventor： Tomohiro Okamura

IPC: H01L21/76

CPC classification number: H01L21/84 ,  H01L27/1203

Abstract: A method for fabricating a semiconductor device includes: providing a semiconductor substrate; forming a STI region on the semiconductor substrate; forming a channel region on the semiconductor substrate; implanting impurities into the STI region; and performing a thermal treatment to diffuse impurities to a side of the channel region.

Abstract translation: 一种制造半导体器件的方法包括：提供半导体衬底; 在半导体衬底上形成STI区; 在所述半导体衬底上形成沟道区; 将杂质植入STI区域; 并进行热处理以将杂质扩散到沟道区的一侧。

公开(公告)号：US20080057668A1

公开(公告)日：2008-03-06

申请号：US11511277

申请日：2006-08-29

Applicant: Tomohiro Okamura

Inventor： Tomohiro Okamura

IPC: H01L21/76

CPC classification number: H01L21/84 ,  H01L27/1203

Abstract: According to the present invention, a method for fabricating a semiconductor device includes: providing a semiconductor substrate; forming a STI region on the semiconductor substrate; forming a channel region on the semiconductor substrate; implanting impurities into the STI region; and performing a thermal treatment to diffuse impurities to a side of the channel region.

Abstract translation: 根据本发明，一种制造半导体器件的方法包括：提供半导体衬底; 在半导体衬底上形成STI区; 在所述半导体衬底上形成沟道区; 将杂质植入STI区域; 并进行热处理以将杂质扩散到沟道区的一侧。

公开(公告)号：US08071415B2

公开(公告)日：2011-12-06

申请号：US12659601

申请日：2010-03-15

Applicant: Tomohiro Okamura ,  Masao Okihara

Inventor： Tomohiro Okamura ,  Masao Okihara

IPC: H01L21/00

CPC classification number: H01L27/14 ,  H01L27/144

Abstract: There is provided a method of fabricating a semiconductor device having plural light receiving elements, and having an amplifying element, the method including: a) forming an active region on the semiconductor substrate for configuring the amplifying element; b) forming a light receiving element region on the semiconductor substrate for forming the plural light receiving elements, with the active region acting as a reference for positioning; c) implanting an impurity into the light receiving element region; d) repeating the process b) and the process c) a number of times that equals a number of diffusion layers in the light receiving element region; e) after implanting the impurity, performing a drive-in process to carry out drive in of the semiconductor substrate; and f) the process e), forming an amplifying element forming process by implanting an impurity in the active region.

Abstract translation: 提供一种制造具有多个光接收元件并具有放大元件的半导体器件的方法，该方法包括：a）在半导体衬底上形成用于配置放大元件的有源区; b）在所述半导体衬底上形成用于形成所述多个光接收元件的受光元件区域，所述有源区域用作定位的基准; c）将杂质注入光接收元件区域; d）重复步骤b）和过程c）等于光接收元件区域中的多个扩散层的次数; e）在注入杂质之后，执行驱动工艺以进行半导体衬底的驱动; 和f）工艺e），通过在有源区中注入杂质形成放大元件形成工艺。

公开(公告)号：US20100248410A1

公开(公告)日：2010-09-30

申请号：US12659601

申请日：2010-03-15

Applicant: Tomohiro Okamura ,  Masao Okihara

Inventor： Tomohiro Okamura ,  Masao Okihara

IPC: H01L31/18

CPC classification number: H01L27/14 ,  H01L27/144

Abstract: There is provided a method of fabricating a semiconductor device having plural light receiving elements, and having an amplifying element, the method including: a) forming an active region on the semiconductor substrate for configuring the amplifying element; b) forming a light receiving element region on the semiconductor substrate for forming the plural light receiving elements, with the active region acting as a reference for positioning; c) implanting an impurity into the light receiving element region; d) repeating the process b) and the process c) a number of times that equals a number of diffusion layers in the light receiving element region; e) after implanting the impurity, performing a drive-in process to carry out drive in of the semiconductor substrate; and f) the process e), forming an amplifying element forming process by implanting an impurity in the active region.

Abstract translation: 提供一种制造具有多个光接收元件并具有放大元件的半导体器件的方法，该方法包括：a）在半导体衬底上形成用于配置放大元件的有源区; b）在所述半导体衬底上形成用于形成所述多个光接收元件的受光元件区域，所述有源区域用作定位的基准; c）将杂质注入光接收元件区域; d）重复步骤b）和过程c）等于光接收元件区域中的多个扩散层的次数; e）在注入杂质之后，执行驱动工艺以进行半导体衬底的驱动; 和f）工艺e），通过在有源区中注入杂质形成放大元件形成工艺。

公开(公告)号：US20050260805A1

公开(公告)日：2005-11-24

申请号：US10989024

申请日：2004-11-16

Applicant: Tomohiro Okamura

Inventor： Tomohiro Okamura

IPC: H01L21/28 ,  H01L21/00 ,  H01L21/331 ,  H01L21/336 ,  H01L21/338 ,  H01L21/84 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66772

Abstract: A method for producing a semiconductor device with an SOI substrate having a support substrate 1 and a semiconductor layer 3 that interpose a first insulating film 2 between them includes the following steps. An element region and an element-separation region 4 are formed in the semiconductor layer 3. A gate insulating film 5 is formed on the semiconductor layer 3. A gate electrode 6 is formed on the gate insulating film 5. A second insulating film 7 is formed. The gate insulating film 5 is removed. First thickness adjustment is performed. Ion implantation introducing low concentration impurities is performed on the thickness-adjusted semiconductor layers 3 and 8. A first sidewall portion 7a is formed on the side surfaces of the gate electrode 6. A second sidewall portion 10a is formed on the side surfaces of the first sidewall portion 7a.

Abstract translation: 一种具有SOI衬底的半导体器件的制造方法，所述SOI衬底具有支撑衬底1和在其间插入第一绝缘膜2的半导体层3，其包括以下步骤。 在半导体层3中形成元件区域和元件分离区域4。 在半导体层3上形成栅绝缘膜5。 在栅极绝缘膜5上形成栅电极6。 形成第二绝缘膜7。 去除栅极绝缘膜5。 进行第一厚度调整。 在厚度调整的半导体层3和8上进行引入低浓度杂质的离子注入。 第一侧壁部分7a形成在栅电极6的侧表面上。 第二侧壁部分10a形成在第一侧壁部分7a的侧表面上。