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公开(公告)号：US5888859A
公开(公告)日：1999-03-30
申请号：US748912
申请日：1996-11-15
IPC分类号： H01L21/28 , H01L21/285 , H01L21/3213 , H01L21/331 , H01L21/338 , H01L29/08 , H01L29/205 , H01L29/423 , H01L29/43 , H01L29/47 , H01L29/73 , H01L29/737 , H01L29/812
CPC分类号： H01L29/66863 , H01L21/28587 , H01L21/32139 , H01L29/0891 , H01L29/42316 , H01L29/475 , H01L29/66878 , H01L29/8128
摘要： A method of making a semiconductor device includes forming a recess in a compound semiconductor substrate using a patterned insulating film on a surface of the substrate, implanting dopant ions at the bottom of the recess to form a channel region, and depositing a refractory metal film. The refractory metal film is etched, using a resist pattern, to form a gate electrode and additional dopant ions are implanted to form relatively highly doped regions intersecting the channel region. Very highly doped regions are formed my implantation, after removing the insulating film, using the gate electrode and remainder of the resist mask as an implantation mask. After stripping the resist, annealing to activate the implanted ions, and depositing a passivating film on the substrate and gate electrode, source and drain electrodes are formed. The field effect transistor thus produced has a high breakdown voltage, improved reliability, a highly controlled pinch-off voltage, and improved transconductance and operating speed.
摘要翻译： 制造半导体器件的方法包括：在衬底的表面上使用图案化的绝缘膜在化合物半导体衬底中形成凹陷，在凹部的底部注入掺杂离子以形成沟道区，并沉积难熔金属膜。 使用抗蚀剂图案蚀刻难熔金属膜以形成栅电极，并且注入另外的掺杂剂离子以形成与沟道区相交的相对高掺杂的区域。 在去除绝缘膜之后，使用栅电极和抗蚀剂掩模的其余部分作为注入掩模，形成非常高掺杂的区域。 在剥离抗蚀剂之后，退火以激活注入的离子，并且在衬底和栅电极，源电极和漏极上形成钝化膜。 这样产生的场效应晶体管具有高的击穿电压，改进的可靠性，高度控制的截止电压以及改进的跨导和操作速度。
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公开(公告)号：US5808332A
公开(公告)日：1998-09-15
申请号：US530446
申请日：1995-09-19
IPC分类号： H01L21/338 , H01L29/08 , H01L29/10 , H01L29/812 , H01L29/80 , H01L31/0328
CPC分类号： H01L29/0891 , H01L29/1029 , H01L29/8124 , H01L29/8128
摘要： A depletion layer forming element, for instance, a low impurity concentration layer, is provided between a gate electrode and a source or drain electrode. The depletion layer forms a surface depletion layer closer to a semiconductor substrate than a depletion layer formed in an active layer opposite the gate electrode. Alternatively, the depletion layer forming element is a reduced thickness portion of the active layer.
摘要翻译： 耗尽层形成元件，例如低杂质浓度层，设置在栅极和源极或漏极之间。 耗尽层形成比形成在与栅电极相对的有源层中形成的耗尽层更靠近半导体衬底的表面耗尽层。 或者，耗尽层形成元件是活性层的厚度减小部分。
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公开(公告)号：US5888860A
公开(公告)日：1999-03-30
申请号：US650032
申请日：1996-05-17
IPC分类号： H01L29/812 , H01L21/285 , H01L21/338 , H01L29/10 , H01L29/80 , H01L21/28
CPC分类号： H01L29/66863 , H01L21/28587 , H01L29/1029 , H01L29/802
摘要： A method of fabricating an FET includes forming an active layer including a low dopant concentration layer, forming a recess in the active layer so that the bottom of the recess is present within the low dopant concentration semiconductor layer, forming side walls in the recess, and forming a gate electrode in the-recess using the side walls as masks. The gate length can be precisely reduced by the side walls. Further, even when the active layer is anisotropically etched to form the side walls, the low dopant concentration semiconductor layer is subjected to the etching. Therefore, a part of the active layer where a greater part of channel current flows is not adversely affected by the etching. Therefore, any variation in the thickness of the active layer does not vary the channel current of the transistor.
摘要翻译： 一种制造FET的方法包括形成包括低掺杂剂浓度层的有源层，在有源层中形成凹陷，使得凹陷的底部存在于低掺杂剂浓度半导体层内，形成凹部中的侧壁，以及 使用侧壁作为掩模在凹槽中形成栅电极。 可以通过侧壁精确地减小浇口长度。 此外，即使当活性层各向异性地蚀刻以形成侧壁时，对低掺杂剂浓度半导体层进行蚀刻。 因此，大部分沟道电流流动的有源层的一部分不会受到蚀刻的不利影响。 因此，有源层的厚度的任何变化不会改变晶体管的沟道电流。
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公开(公告)号：US5693560A
公开(公告)日：1997-12-02
申请号：US532277
申请日：1995-09-22
IPC分类号： H01L21/28 , H01L21/285 , H01L21/335 , H01L21/338 , H01L29/423 , H01L29/43 , H01L29/47 , H01L29/812 , H01L21/44
CPC分类号： H01L29/66462 , H01L21/28581 , H01L29/42316 , H01L29/475 , H01L29/8128
摘要： An electrode of a semiconductor device includes an oxygen absorbing layer disposed on a surface of a semiconductor layer and a refractory metal layer disposed on the oxygen absorbing layer. Oxygen of a spontaneous oxide film on the semiconductor layer is taken to the oxygen absorbing layer, preventing the formation of interface levels within an interface metamorphic layer, preventing I.sub.d drifting.
摘要翻译： 半导体器件的电极包括设置在半导体层的表面上的氧吸收层和设置在氧吸收层上的难熔金属层。 将半导体层上的自发氧化膜的氧气带到氧吸收层，防止在界面变质层内形成界面层，防止Id漂移。
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公开(公告)号：US5534452A
公开(公告)日：1996-07-09
申请号：US534212
申请日：1995-09-26
IPC分类号： H01L21/28 , H01L21/285 , H01L21/338 , H01L21/8252 , H01L29/41 , H01L29/812 , H01L21/8232
CPC分类号： H01L29/66863 , H01L21/28587 , H01L21/28593 , H01L21/8252
摘要： A method for producing a semiconductor device includes preparing a semi-insulating substrate having an active layer, depositing a first insulating film on the active layer and forming two first openings in the first insulating film, depositing a second insulating film on the first insulating film filling the first openings and make a flat surface with the surface of the first insulating film, removing a portion of the first insulating film between the first openings to form a second opening, etching the active layer through the second opening formed by the removal of the first insulating film, removing parts of the second insulating film on opposite sides of the first insulating film from the active layer to form a third opening, and etching the active layer through the third opening formed by removal of the second insulating film to form a double-stage recess. The widths of the first and second stage recesses are determined by the pattern of the first insulating film and the patterns of the first and second insulating films, respectively, so that only one alignment step is sufficient and the positions and the widths of the recess are easily controlled, enhancing the degree of freedom in the recess width.
摘要翻译： 一种制造半导体器件的方法包括制备具有有源层的半绝缘衬底，在有源层上沉积第一绝缘膜并在第一绝缘膜中形成两个第一开口，在第一绝缘膜填充物上沉积第二绝缘膜 所述第一开口并与所述第一绝缘膜的表面形成平坦表面，在所述第一开口之间移除所述第一绝缘膜的一部分以形成第二开口，通过所述第二开口蚀刻所述有源层，所述第二开口通过所述第一开口形成， 绝缘膜，从有源层去除第一绝缘膜的相对侧上的第二绝缘膜的部分以形成第三开口，并且通过除去第二绝缘膜形成的第三开口蚀刻有源层， 舞台休息。 第一和第二阶段凹槽的宽度分别由第一绝缘膜的图案和第一和第二绝缘膜的图案确定，使得仅一个对准步骤是足够的，并且凹部的位置和宽度是 容易控制，增加了凹陷宽度的自由度。
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