公开(公告)号：US20090122609A1

公开(公告)日：2009-05-14

申请号：US12354867

申请日：2009-01-16

申请人： Tsutomu OKAZAKI ,  Daisuke OKADA ,  Kyoya NITTA ,  Toshihiro TANAKA ,  Akira KATA ,  Toshikazu MATSUI ,  Yasushi ISHII ,  Digh HISAMOTO ,  Kan YASUI

发明人： Tsutomu OKAZAKI ,  Daisuke OKADA ,  Kyoya NITTA ,  Toshihiro TANAKA ,  Akira KATA ,  Toshikazu MATSUI ,  Yasushi ISHII ,  Digh HISAMOTO ,  Kan YASUI

IPC分类号： G11C16/04 ,  H01L27/115

CPC分类号： H01L27/1157 ,  G11C16/0425 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/0649 ,  H01L29/4234 ,  H01L29/42344 ,  H01L29/518 ,  H01L29/66833 ,  H01L29/792

摘要： A semiconductor memory array includes a first nonvolatile memory cell having a first charge storage layer and a first gate electrode and a second nonvolatile memory cell, adjacent to the first memory cell in a first direction, having a second charge storage layer and a second gate electrode. The first and second electrodes extend in a second direction perpendicular to the first direction, the first electrode has a first contact section extending toward the second electrode in the first direction, and the second electrode has a second contact section extending toward the first electrode in the first direction. The first and second contact positions are shifted in the second direction, respectively, and the first electrode and the first contact section are electrically separated from the second electrode and the second contact section.

摘要翻译： 半导体存储器阵列包括具有第一电荷存储层和第一非易失性存储单元的第一非易失性存储单元，第一非易失性存储单元与第一存储单元相邻，具有第二电荷存储层和第二栅电极 。 第一电极和第二电极在垂直于第一方向的第二方向上延伸，第一电极具有在第一方向上朝向第二电极延伸的第一接触部分，并且第二电极具有朝向第一电极的第二接触部分 第一个方向 第一和第二接触位置分别沿第二方向移动，第一电极和第一接触部分与第二电极和第二接触部分电气分离。

公开(公告)号：US20110024820A1

公开(公告)日：2011-02-03

申请号：US12904923

申请日：2010-10-14

申请人： Takeshi SAKAI ,  Yasushi ISHII ,  Tsutomu OKAZAKI ,  Masaru NAKAMICHI ,  Toshikazu MATSUI ,  Kyoya NITTA ,  Satoru MACHIDA ,  Munekatsu NAKAGAWA ,  Yuichi TSUKADA

发明人： Takeshi SAKAI ,  Yasushi ISHII ,  Tsutomu OKAZAKI ,  Masaru NAKAMICHI ,  Toshikazu MATSUI ,  Kyoya NITTA ,  Satoru MACHIDA ,  Munekatsu NAKAGAWA ,  Yuichi TSUKADA

IPC分类号： H01L29/792

CPC分类号： H01L27/11568 ,  H01L21/823842 ,  H01L21/82385 ,  H01L21/823857 ,  H01L21/823864 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11573

摘要： For enhancing the high performance of a non-volatile semiconductor memory device having an MONOS type transistor, a non-volatile semiconductor memory device is provided with MONOS type transistors having improved performance in which the memory cell of an MONOS non-volatile memory comprises a control transistor and a memory transistor. A control gate of the control transistor comprises an n-type polycrystal silicon film and is formed over a gate insulative film comprising a silicon oxide film. A memory gate of the memory transistor comprises an n-type polycrystal silicon film and is disposed on one of the side walls of the control gate. The memory gate comprises a doped polycrystal silicon film with a sheet resistance lower than that of the control gate comprising a polycrystal silicon film formed by ion implantation of impurities to the undoped silicon film.

摘要翻译： 为了增强具有MONOS型晶体管的非易失性半导体存储器件的高性能，非易失性半导体存储器件被提供有具有改进性能的MONOS型晶体管，其中MONOS非易失性存储器的存储单元包括控制 晶体管和存储晶体管。 控制晶体管的控制栅极包括n型多晶硅膜，并且形成在包括氧化硅膜的栅极绝缘膜上。 存储晶体管的存储栅极包括n型多晶硅膜，并设置在控制栅极的一个侧壁上。 存储器栅极包括具有低于控制栅极的薄层电阻的掺杂多晶硅膜，其包括通过将杂质离子注入未掺杂的硅膜形成的多晶硅膜。

公开(公告)号：US20090095995A1

公开(公告)日：2009-04-16

申请号：US12239807

申请日：2008-09-28

申请人： Yoshiyuki KAWASHIMA ,  Koichi TOBA ,  Yasushi ISHII ,  Toshikazu MATSUI ,  Takashi HASHIMOTO

发明人： Yoshiyuki KAWASHIMA ,  Koichi TOBA ,  Yasushi ISHII ,  Toshikazu MATSUI ,  Takashi HASHIMOTO

IPC分类号： H01L29/78 ,  H01L21/02 ,  H01L21/8242 ,  H01L21/20

CPC分类号： H01L28/60 ,  H01L27/0629 ,  H01L27/0805 ,  H01L27/105 ,  H01L27/10805 ,  H01L27/11526 ,  H01L27/11531 ,  H01L27/11573 ,  H01L28/40

摘要： In connection with a semiconductor device including a capacitor element there is provided a technique capable of improving the reliability of the capacitor element. A capacitor element is formed in an element isolation region formed over a semiconductor substrate. The capacitor element includes a lower electrode and an upper electrode formed over the lower electrode through a capacitor insulating film. Basically, the lower electrode and the upper electrode are formed from polysilicon films and a cobalt silicide film formed over the surfaces of the polysilicon films. End portions of the cobalt silicide film formed over the upper electrode are spaced apart a distance from end portions of the upper electrode. Besides, end portions of the cobalt silicide film formed over the lower electrode are spaced apart a distance from boundaries between the upper electrode and the lower electrode.

摘要翻译： 关于包括电容器元件的半导体器件，提供了一种能够提高电容器元件的可靠性的技术。 电容器元件形成在半导体衬底上形成的元件隔离区域中。 电容器元件包括通过电容器绝缘膜形成在下电极上的下电极和上电极。 基本上，下电极和上电极由形成在多晶硅膜的表面上的多晶硅膜和硅化钴膜形成。 形成在上电极上的钴硅化物膜的端部与上电极的端部间隔开一定距离。 此外，形成在下电极上的钴硅化物膜的端部与上电极和下电极之间的边界间隔一定距离。