Structures having lattice-mismatched single-crystalline semiconductor layers on the same lithographic level and methods of manufacturing the same
    1.
    发明授权
    Structures having lattice-mismatched single-crystalline semiconductor layers on the same lithographic level and methods of manufacturing the same 有权
    具有相同光刻层上晶格失配的单晶半导体层的结构及其制造方法

    公开(公告)号:US07994028B2

    公开(公告)日:2011-08-09

    申请号:US12538759

    申请日:2009-08-10

    IPC分类号: H01L21/20 H01L21/36

    摘要: A semiconductor substrate containing a single crystalline group IV semiconductor is provided. A single crystalline lattice mismatched group IV semiconductor alloy layer is epitaxially grown on a portion of the semiconductor layer, while another portion of the semiconductor layer is masked. The composition of the lattice mismatched group IV semiconductor alloy layer is tuned to substantially match the lattice constant of a single crystalline compound semiconductor layer, which is subsequently epitaxially grown on the single crystalline lattice mismatched group IV semiconductor alloy layer. Thus, a structure having both the group IV semiconductor layer and the single crystalline compound semiconductor layer is provided on the same semiconductor substrate. Group IV semiconductor devices, such as silicon devices, and compound semiconductor devices, such as GaAs devices having a laser emitting capability, may be formed on the on the same lithographic level of the semiconductor substrate.

    摘要翻译: 提供了含有单晶IV族半导体的半导体衬底。 在半导体层的一部分上外延生长单晶格不匹配的IV族半导体合金层,而半导体层的另一部分被掩蔽。 调整晶格失配的IV族半导体合金层的组成基本上与单晶化合物半导体层的晶格常数匹配,随后在单晶格子失配的IV族半导体合金层上外延生长。 因此,具有IV族半导体层和单晶化合物半导体层的结构设置在同一半导体衬底上。 诸如硅器件的IV族半导体器件和诸如具有激光发射能力的GaAs器件的化合物半导体器件可以形成在半导体衬底的相同的光刻层上。

    STRUCTURES HAVING LATTICE-MISMATCHED SINGLE-CRYSTALLINE SEMICONDUCTOR LAYERS ON THE SAME LITHOGRAPHIC LEVEL AND METHODS OF MANUFACTURING THE SAME
    2.
    发明申请
    STRUCTURES HAVING LATTICE-MISMATCHED SINGLE-CRYSTALLINE SEMICONDUCTOR LAYERS ON THE SAME LITHOGRAPHIC LEVEL AND METHODS OF MANUFACTURING THE SAME 有权
    具有层间错位的单晶半导体层的结构在相同的层次上及其制造方法

    公开(公告)号:US20090298269A1

    公开(公告)日:2009-12-03

    申请号:US12538759

    申请日:2009-08-10

    IPC分类号: H01L21/20

    摘要: A semiconductor substrate containing a single crystalline group IV semiconductor is provided. A single crystalline lattice mismatched group IV semiconductor alloy layer is epitaxially grown on a portion of the semiconductor layer, while another portion of the semiconductor layer is masked. The composition of the lattice mismatched group IV semiconductor alloy layer is tuned to substantially match the lattice constant of a single crystalline compound semiconductor layer, which is subsequently epitaxially grown on the single crystalline lattice mismatched group IV semiconductor alloy layer. Thus, a structure having both the group IV semiconductor layer and the single crystalline compound semiconductor layer is provided on the same semiconductor substrate. Group IV semiconductor devices, such as silicon devices, and compound semiconductor devices, such as GaAs devices having a laser emitting capability, may be formed on the on the same lithographic level of the semiconductor substrate.

    摘要翻译: 提供了含有单晶IV族半导体的半导体衬底。 在半导体层的一部分上外延生长单晶格不匹配的IV族半导体合金层,而半导体层的另一部分被掩蔽。 调整晶格失配的IV族半导体合金层的组成基本上与单晶化合物半导体层的晶格常数匹配,随后在单晶格子失配的IV族半导体合金层上外延生长。 因此,具有IV族半导体层和单晶化合物半导体层的结构设置在同一半导体衬底上。 诸如硅器件的IV族半导体器件和诸如具有激光发射能力的GaAs器件的化合物半导体器件可以形成在半导体衬底的相同的光刻层上。

    FLEXIBLE FIBER TO WAFER INTERFACE
    5.
    发明申请
    FLEXIBLE FIBER TO WAFER INTERFACE 有权
    柔性纤维到波形界面

    公开(公告)号:US20130251304A1

    公开(公告)日:2013-09-26

    申请号:US13428277

    申请日:2012-03-23

    IPC分类号: G02B6/12 G02B6/42

    摘要: An interface device includes a flexible substrate portion, a flexible cladding portion arranged on the substrate portion, a flexible single-mode waveguide portion arranged on the cladding portion including a substantially optically transparent material, a first engagement feature operative to engage a portion of a wafer, and a connector portion engaging a first distal end of the flexible substrate portion, the connector portion operative to engage a portion of an optical fiber ferrule.

    摘要翻译: 接口装置包括柔性基板部分,布置在基板部分上的柔性包层部分,布置在包括基本上光学透明材料的包层部分上的柔性单模波导部分,可操作以接合晶片的一部分的第一接合特征 以及与柔性基板部分的第一远端接合的连接器部分,该连接器部分可操作以接合光纤套圈的一部分。

    Method For Forming A Robust Top-Down Silicon Nanowire Structure Using A Conformal Nitride And Such Structure
    7.
    发明申请
    Method For Forming A Robust Top-Down Silicon Nanowire Structure Using A Conformal Nitride And Such Structure 有权
    使用保形氮化物和这种结构形成坚固的自上而下的硅纳米线结构的方法

    公开(公告)号:US20100295020A1

    公开(公告)日:2010-11-25

    申请号:US12469304

    申请日:2009-05-20

    IPC分类号: H01L29/66 H01L21/18

    摘要: A nanowire product and process for fabricating it has a wafer with a buried oxide (BOX) upper layer in which a well is formed and the ends of a nanowire are on the BOX layer forming a beam that spans the well. A mask coating is formed on the upper surface of the BOX layer leaving an uncoated window over a center part of the beam and also forming a mask coating around the beam intermediate ends between each end of the beam center part and a side wall of the well. Applying oxygen through the window thins the beam center part while leaving the wire intermediate ends over the well thicker and having a generally arched shape. A thermal oxide coating can be placed on the wire and also the mask on the BOX layer before oxidation.

    摘要翻译: 纳米线产品及其制造方法具有具有掩埋氧化物(BOX)上层的晶片,其中形成阱,并且纳米线的端部在BOX层上形成跨越阱的束。 掩模涂层形成在BOX层的上表面上,在光束的中心部分上留下未涂覆的窗口,并且还在光束中心部分的每个端部和阱的侧壁之间的光束中间端部周围形成掩模涂层 。 通过窗户施加氧气,使梁中心部分离开,同时将钢丝中间端部覆盖在较厚的孔上并具有大致拱形的形状。 在氧化之前,可以将热氧化物涂层放置在导线上以及BOX层上的掩模上。

    Multilevel fabrication processing by functional regrouping of material deposition, lithography, and etching
    8.
    发明授权
    Multilevel fabrication processing by functional regrouping of material deposition, lithography, and etching 失效
    通过材料沉积,光刻和蚀刻的功能重组进行多层制造加工

    公开(公告)号:US07482277B2

    公开(公告)日:2009-01-27

    申请号:US11285598

    申请日:2005-11-22

    IPC分类号: H01L21/302

    摘要: A method of multilevel microfabrication processing is provided. The method includes providing a planar substrate that comprises one or more material layers. A first hardmask layer placed on top of the substrate is patterned into the lithographic pattern desired for the top lithographic layer. Subsequent hardmask layers are patterned until the number of hardmask layers equals the number of lithographic layers desired. The method includes etching into the substrate and stripping the top hardmask layer. Furthermore, the method includes alternating etching into the substrate and stripping the subsequent hardmask layers until the bottom hardmask layer is stripped.

    摘要翻译: 提供了一种多级微细加工处理方法。 该方法包括提供包括一个或多个材料层的平面基板。 放置在基板顶部的第一硬掩模层被图案化成顶层光刻层所期望的光刻图案。 随后的硬掩模层被图案化直到硬掩模层的数量等于所需的光刻层的数量。 该方法包括蚀刻到衬底中并剥离顶部硬掩模层。 此外,该方法包括交替蚀刻到衬底中并剥离随后的硬掩模层,直到底部硬掩模层被剥离为止。

    Transparent photodetector
    9.
    发明授权
    Transparent photodetector 有权
    透明光电探测器

    公开(公告)号:US08604574B2

    公开(公告)日:2013-12-10

    申请号:US13099827

    申请日:2011-05-03

    申请人: Tymon Barwicz

    发明人: Tymon Barwicz

    IPC分类号: H01L27/14 H01L31/0232

    CPC分类号: G01J1/42

    摘要: The transparent photodetector includes a substrate; a waveguide on the substrate; a displaceable structure that can be displaced with respect to the substrate, the displaceable structure in proximity to the waveguide; and a silicon nanowire array suspended with respect to the substrate and mechanically linked to the displaceable structure, the silicon nanowire array comprising a plurality of silicon nanowires having piezoresistance. In operation, a light source propagating through the waveguide results in an optical force on the displaceable structure which further results in a strain on the nanowires to cause a change in electrical resistance of the nanowires. The substrate may be a semiconductor on insulator substrate.

    摘要翻译: 透明光电检测器包括基板; 衬底上的波导; 可移位的结构,其可相对于衬底移位,靠近波导的位移结构; 以及相对于衬底悬挂并机械地连接到可位移结构的硅纳米线阵列,所述硅纳米线阵列包括具有压阻的多个硅纳米线。 在操作中,通过波导传播的光源导致可移动结构上的光学力,这进一步导致纳米线上的应变导致纳米线的电阻变化。 衬底可以是绝缘体上半导体衬底上的半导体。

    Flexible fiber to wafer interface
    10.
    发明授权
    Flexible fiber to wafer interface 有权
    柔性光纤到晶圆接口

    公开(公告)号:US08545108B1

    公开(公告)日:2013-10-01

    申请号:US13453027

    申请日:2012-04-23

    IPC分类号: G02B6/38

    摘要: A fiber to wafer interface system includes an interface device comprising a flexible substrate portion, a flexible cladding portion arranged on the substrate portion, a flexible single-mode waveguide portion arranged on the cladding portion including a substantially optically transparent material, a connector portion engaging a first distal end of the flexible substrate portion, the connector portion operative to engage a portion of an optical fiber ferrule, a wafer portion comprising a single mode waveguide portion arranged on a portion of the wafer, an adhesive disposed between a portion of the single mode waveguide portion of the body portion and the single mode waveguide portion of the wafer portion, the adhesive securing the body portion to the wafer portion.

    摘要翻译: 光纤到晶片接口系统包括:接口装置,包括柔性基板部分,布置在基板部分上的柔性包层部分,布置在包括基本上光学透明材料的包层部分上的柔性单模波导部分, 柔性基板部分的第一远端,连接器部分可操作以接合光纤套圈的一部分,晶片部分包括布置在晶片的一部分上的单模波导部分,粘合剂设置在单模 主体部分的波导部分和晶片部分的单模波导部分,将本体部分固定到晶片部分上的粘合剂。