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公开(公告)号:US20220271157A1
公开(公告)日:2022-08-25
申请号:US17224108
申请日:2021-04-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chung-Yen Feng , Chen-An Kuo , Ching-Wei Teng , Po-Chun Lai
Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
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公开(公告)号:US11616139B2
公开(公告)日:2023-03-28
申请号:US17224108
申请日:2021-04-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chung-Yen Feng , Chen-An Kuo , Ching-Wei Teng , Po-Chun Lai
Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
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公开(公告)号:US09929056B1
公开(公告)日:2018-03-27
申请号:US15359389
申请日:2016-11-22
Applicant: United Microelectronics Corp.
Inventor: Te-Chiu Tsai , Shih-Yin Hsiao , Ching-Wei Teng , Tun-Jen Cheng , Hung-Yi Tsai , Shan-Shi Huang
IPC: H01L21/3205 , H01L21/8234 , H01L21/28 , H01L21/02 , H01L21/027
CPC classification number: H01L21/823462 , H01L21/32 , H01L21/823456
Abstract: A method for forming gate structures for a HV device and a MV device is provided. The method includes forming a HV oxide layer on the substrate, covering a first region predetermined for forming the HV device. Further in the method, a dielectric mask is formed on a central portion of the HV oxide layer. A thermal oxidation process is performed to form a MV oxide layer on the substrate at a second region predetermined for forming the MV device, wherein peripheral portions of the HV oxide layer not covered by the dielectric mask grow thicker. The dielectric mask is removed. A conductive layer is formed over the substrate. The conductive layer, the HV oxide layer, the MV oxide layer are patterned to form the gate structures.
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公开(公告)号:US11670713B2
公开(公告)日:2023-06-06
申请号:US17884599
申请日:2022-08-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chung-Yen Feng , Chen-An Kuo , Ching-Wei Teng , Po-Chun Lai
CPC classification number: H01L29/7816 , H01L21/28518 , H01L21/743 , H01L29/1087 , H01L29/1095 , H01L29/45 , H01L29/66681
Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
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公开(公告)号:US20220384638A1
公开(公告)日:2022-12-01
申请号:US17884599
申请日:2022-08-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chung-Yen Feng , Chen-An Kuo , Ching-Wei Teng , Po-Chun Lai
Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
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