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公开(公告)号:US11791386B2
公开(公告)日:2023-10-17
申请号:US17895054
申请日:2022-08-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/76 , H01L31/062 , H01L29/94 , H01L29/40 , H01L27/088 , H01L29/78
CPC classification number: H01L29/404 , H01L27/088 , H01L29/7816
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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公开(公告)号:US11616139B2
公开(公告)日:2023-03-28
申请号:US17224108
申请日:2021-04-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chung-Yen Feng , Chen-An Kuo , Ching-Wei Teng , Po-Chun Lai
Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
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公开(公告)号:US20210351294A1
公开(公告)日:2021-11-11
申请号:US16896233
申请日:2020-06-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Ya-Hsin Huang , Chen-An Kuo , Po-Chun Lai
Abstract: A high voltage semiconductor device includes a semiconductor substrate, a gate structure, a drift region, a drain region, and an isolation structure. The gate structure is disposed on the semiconductor substrate. The drift region is disposed in the semiconductor substrate and partially disposed at a side of the gate structure. The drain region is disposed in the drift region. The isolation structure is at least partially disposed in the drift region. A part of the isolation structure is disposed between the drain region and the gate structure. A top of the isolation structure includes a flat surface, and a bottom of the isolation structure includes a curved surface.
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公开(公告)号:US11798998B2
公开(公告)日:2023-10-24
申请号:US17895042
申请日:2022-08-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/76 , H01L31/062 , H01L29/94 , H01L29/40 , H01L27/088 , H01L29/78
CPC classification number: H01L29/404 , H01L27/088 , H01L29/7816
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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公开(公告)号:US20220406902A1
公开(公告)日:2022-12-22
申请号:US17895042
申请日:2022-08-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/40 , H01L27/088 , H01L29/78
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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公开(公告)号:US11804526B2
公开(公告)日:2023-10-31
申请号:US17895066
申请日:2022-08-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/76 , H01L31/062 , H01L29/94 , H01L29/40 , H01L27/088 , H01L29/78
CPC classification number: H01L29/404 , H01L27/088 , H01L29/7816
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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公开(公告)号:US20220406903A1
公开(公告)日:2022-12-22
申请号:US17895054
申请日:2022-08-24
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/40 , H01L27/088 , H01L29/78
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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公开(公告)号:US11462621B2
公开(公告)日:2022-10-04
申请号:US17200908
申请日:2021-03-15
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/76 , H01L31/062 , H01L29/40 , H01L27/088 , H01L29/78
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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公开(公告)号:US20220271157A1
公开(公告)日:2022-08-25
申请号:US17224108
申请日:2021-04-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chung-Yen Feng , Chen-An Kuo , Ching-Wei Teng , Po-Chun Lai
Abstract: An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
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公开(公告)号:US20220254888A1
公开(公告)日:2022-08-11
申请号:US17200908
申请日:2021-03-15
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Chieh Wang , Po-Chun Lai , Ke-Feng Lin , Chen-An Kuo , Ze-Wei Jhou
IPC: H01L29/40 , H01L29/78 , H01L27/088
Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.
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