公开(公告)号：US09859290B1

公开(公告)日：2018-01-02

申请号：US15342098

申请日：2016-11-02

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Lanxiang Wang ,  Hong Liao ,  Chao Jiang ,  Bo Liu ,  Xin Xu

IPC: H01L21/336 ,  H01L27/11521 ,  H01L29/49 ,  H01L29/423 ,  H01L23/522 ,  H01L27/08 ,  H01L29/92 ,  H01L27/108 ,  H01L27/11502

CPC classification number: H01L27/11521 ,  H01L21/28273 ,  H01L23/485 ,  H01L23/5223 ,  H01L27/0805 ,  H01L27/10852 ,  H01L27/11502 ,  H01L28/55 ,  H01L29/42324 ,  H01L29/4966 ,  H01L29/92 ,  H01L2924/30105

Abstract: A method for fabricating memory device includes the steps of: providing a substrate; forming a tunnel oxide layer on the substrate; forming a first gate layer on the tunnel oxide layer; forming a negative capacitance (NC) insulating layer on the first gate layer; and forming a second gate layer on the NC insulating layer. Preferably, the second gate layer further includes a work function metal layer on the NC insulating layer and a low resistance metal layer on the work function metal layer.