公开(公告)号：US20230195989A1

公开(公告)日：2023-06-22

申请号：US17574527

申请日：2022-01-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Pin-Yen Tsai ,  Yi-Jung Chang

IPC: G06F30/392 ,  G06N20/10

CPC classification number: G06F30/392 ,  G06N20/10

Abstract: The invention provides an operation method of a semiconductor system, which includes providing a system which includes a layout pattern to scanning electron microscope (SEM) pattern prediction model (LS model) and a novelty detection model (ND model), inputting a layout pattern to the ND model, and the ND model judges whether the layout pattern is a novel layout pattern, and if the layout pattern is confirmed as the novel layout pattern after judgment, performing a process step on the novel layout pattern to form an SEM (scanning electron microscope) pattern.

公开(公告)号：US09171127B1

公开(公告)日：2015-10-27

申请号：US14509074

申请日：2014-10-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Liang Hou ,  Wen-Jung Liao ,  Chi-Fang Huang ,  Yi-Jung Chang

IPC: G06F17/50

CPC classification number: G06F17/5081 ,  G03F7/70433

Abstract: A design layout generating method is provided. A design layout including a first pattern and a second pattern is provided to a computer system, wherein the first pattern and the second pattern meet a design rule of an integrated circuit, respectively. The first pattern and the second pattern are combined into a third pattern. Next, the third pattern is checked if it meets a definition of a weak pattern, wherein the weak pattern is a pattern that meets the design rule but still forms defects. Then, the third pattern is modified and a new design layout is generated.

Abstract translation: 提供了一种设计布局生成方法。 将包括第一图案和第二图案的设计布局提供给计算机系统，其中第一图案和第二图案分别满足集成电路的设计规则。 第一图案和第二图案被组合成第三图案。 接下来，如果它符合弱图案的定义，则检查第三图案，其中弱图案是符合设计规则但仍形成缺陷的图案。 然后，修改第三个模式并生成新的设计布局。

公开(公告)号：US12032891B2

公开(公告)日：2024-07-09

申请号：US17574527

申请日：2022-01-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Pin-Yen Tsai ,  Yi-Jung Chang

IPC: G06F30/392 ,  G06N20/10

CPC classification number: G06F30/392 ,  G06N20/10

Abstract: The invention provides an operation method of a semiconductor system, which includes providing a system which includes a layout pattern to scanning electron microscope (SEM) pattern prediction model (LS model) and a novelty detection model (ND model), inputting a layout pattern to the ND model, and the ND model judges whether the layout pattern is a novel layout pattern, and if the layout pattern is confirmed as the novel layout pattern after judgment, performing a process step on the novel layout pattern to form an SEM (scanning electron microscope) pattern.

公开(公告)号：US10762618B1

公开(公告)日：2020-09-01

申请号：US16275480

申请日：2019-02-14

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Pin-Yen Tsai ,  Hsu-Tang Liu ,  Yi-Jung Chang ,  Chun-Liang Hou

IPC: G06K9/00 ,  G06T7/00

Abstract: A mask weak pattern recognition apparatus and a mask weak pattern recognition method are provided. The mask weak pattern recognition apparatus includes a receiving unit, an overlapping unit, an analyzing unit and a training unit. The receiving unit is used for receiving a mask layout and an inspection image of a mask. The overlapping unit is used for overlapping the mask layout and the inspection image to obtain an overlapped image. The analyzing unit is used for obtaining a plurality of risk patterns and a plurality of risk scores each of which corresponds one of the risk patterns according to the overlapped image. The training unit is used for training a recognition model according to the risk patterns and the risk scores.