公开(公告)号：US20240003768A1

公开(公告)日：2024-01-04

申请号：US18334402

申请日：2023-06-14

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Paweena Phatto ,  Maythichai Saithong ,  Eakkasit Dumsong ,  Jiraphat Charoenratpratoom

IPC: G01L9/00 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: G01L9/0045 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48108 ,  H01L2224/73215 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2924/1659 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/16151

Abstract: A semiconductor device has a substrate and a first electrical component including a sensing region disposed over the substrate. The sensing region can be responsive to external stimuli, such as pressure. A cover lid is disposed over the first electrical component and extending to the substrate with an opening in the cover lid aligned over the sensing region. A gel material is disposed within the opening of the cover lid to seal the sensing region with respect to an environment condition, such as liquid. A bond wire is coupled between the first electrical component and substrate. An adhesive layer is disposed around a perimeter of the sensing area and the cover lid is bonded to the adhesive layer. A second electrical component is disposed on the substrate and the first electrical component is disposed on the second electrical component.

公开(公告)号：US11901308B2

公开(公告)日：2024-02-13

申请号：US17382283

申请日：2021-07-21

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Saravuth Sirinorakul ,  Il Kwon Shim ,  Kok Chuen Lock ,  Roel Adeva Robles ,  Eakkasit Dumsong

IPC: H01L23/552 ,  H01L23/36 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L23/495

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/49503 ,  H01L24/32 ,  H01L2224/32245

Abstract: The present disclosure is directed to improving EMI shielding to provide more reliable semiconductor packages. The semiconductor package may be, for example, a lead frame including one or multiple dies attached thereto. The semiconductor package may include only wire bonds or a combination of clip bonds and wire bonds. An integrated shielding structure may be disposed in between the package substrate and the encapsulant to shield internal and/or external EMI. For example, a top surface of the integrated shield structure is exposed.

公开(公告)号：US11784102B2

公开(公告)日：2023-10-10

申请号：US17389294

申请日：2021-07-29

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Eakkasit Dumsong ,  Mike Jayson Candelario ,  Phongsak Sawasdee ,  Jiraphat Charoenratpratoom ,  Paweena Phatto ,  Maythichai Saithong

IPC: H01L23/053 ,  H01L21/52 ,  H01L23/00

CPC classification number: H01L23/053 ,  H01L21/52 ,  H01L23/564

Abstract: A semiconductor package and method for forming thereof are disclosed. The package includes a package substrate having a die cavity with a die attached therein. The package substrate also includes a cavity for bonding a cap thereto to form a hermetic package. The cap is bonded to the cavity using sealing rings.