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公开(公告)号：US10784153B2
公开(公告)日：2020-09-22
申请号：US16134902
申请日：2018-09-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
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公开(公告)号：US20200058544A1
公开(公告)日：2020-02-20
申请号：US16134902
申请日：2018-09-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/532 , H01L23/522
Abstract: A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
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公开(公告)号：US09316901B2
公开(公告)日：2016-04-19
申请号：US14259173
申请日：2014-04-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hsin-Yu Chen , Chia-Wei Huang , Chun-Hsien Huang , Shih-Chun Tsai , Kai-Lin Chuang
Abstract: A method for forming patterns includes the following steps. A first layout including a first target pattern and a first unprintable dummy pattern is provided. A second layout including a second target pattern and a second printable dummy pattern are provided, wherein at least part of the second printable dummy pattern overlaps the first unprintable dummy pattern exposure limit, such that the second printable dummy pattern cannot be formed in a wafer.
Abstract translation: 形成图案的方法包括以下步骤。 提供了包括第一目标图案和第一不可打印虚设图案的第一布局。 提供包括第二目标图案和第二可打印虚拟图案的第二布局，其中第二可打印虚拟图案的至少一部分与第一不可打印虚设图案曝光极限重叠，使得第二可打印虚设图案不能形成在晶片中。
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公开(公告)号：US12183626B2
公开(公告)日：2024-12-31
申请号：US17883647
申请日：2022-08-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A metal interconnect structure includes a first metal interconnection in an inter-metal dielectric (IMD) layer on a substrate, a second metal interconnection on the first metal interconnection, and a cap layer between the first metal interconnection and the second metal interconnection. Preferably, a top surface of the first metal interconnection is even with a top surface of the IMD layer and the cap layer is made of conductive material.
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公开(公告)号：US20220384254A1
公开(公告)日：2022-12-01
申请号：US17883647
申请日：2022-08-09
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/532 , H01L23/522
Abstract: A metal interconnect structure includes a first metal interconnection in an inter-metal dielectric (IMD) layer on a substrate, a second metal interconnection on the first metal interconnection, and a cap layer between the first metal interconnection and the second metal interconnection. Preferably, a top surface of the first metal interconnection is even with a top surface of the IMD layer and the cap layer is made of conductive material.
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Patent Agency Ranking
公开(公告)号：US11450558B2
公开(公告)日：2022-09-20
申请号：US16992055
申请日：2020-08-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
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公开(公告)号：US20200373198A1
公开(公告)日：2020-11-26
申请号：US16992055
申请日：2020-08-12
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A method for fabricating metal interconnect structure includes the steps of: forming a first metal interconnection in a first inter-metal dielectric (IMD) layer on a substrate; forming a cap layer on the first metal interconnection; forming a second IMD layer on the cap layer; performing a first etching process to remove part of the second IMD layer for forming an opening; performing a plasma treatment process; and performing a second etching process to remove polymers from bottom of the opening.
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公开(公告)号：US20250079237A1
公开(公告)日：2025-03-06
申请号：US18950185
申请日：2024-11-18
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-How Chou , Tzu-Hao Fu , Tsung-Yin Hsieh , Chih-Sheng Chang , Shih-Chun Tsai , Kun-Chen Ho , Yang-Chou Lin
IPC: H01L21/768 , H01L23/522 , H01L23/532
Abstract: A metal interconnect structure includes a first metal interconnection in an inter-metal dielectric (IMD) layer on a substrate, a second metal interconnection on the first metal interconnection, and a cap layer between the first metal interconnection and the second metal interconnection. Preferably, a top surface of the first metal interconnection is even with a top surface of the IMD layer and the cap layer is made of conductive material.
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公开(公告)号：US20140220482A1
公开(公告)日：2014-08-07
申请号：US14259173
申请日：2014-04-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hsin-Yu Chen , Chia-Wei Huang , Chun-Hsien Huang , Shih-Chun Tsai , Kai-Lin Chuang
IPC: G03F1/36
Abstract: A method for forming patterns includes the following steps. A first layout including a first target pattern and a first unprintable dummy pattern is provided. A second layout including a second target pattern and a second printable dummy pattern are provided, wherein at least part of the second printable dummy pattern overlaps the first unprintable dummy pattern exposure limit, such that the second printable dummy pattern cannot be formed in a wafer.
Abstract translation: 形成图案的方法包括以下步骤。 提供了包括第一目标图案和第一不可打印虚设图案的第一布局。 提供包括第二目标图案和第二可打印虚拟图案的第二布局，其中第二可打印虚拟图案的至少一部分与第一不可打印虚设图案曝光极限重叠，使得第二可打印虚设图案不能形成在晶片中。
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公开(公告)号：US08748066B2
公开(公告)日：2014-06-10
申请号：US13633876
申请日：2012-10-03
Applicant: United Microelectronics Corp.
Inventor： Hsin-Yu Chen , Chia-Wei Huang , Chun-Hsien Huang , Shih-Chun Tsai , Kai-Lin Chuang
IPC: G03F9/00
Abstract: A method for forming photomasks includes the following steps. A first photomask including a first target pattern and a first unprintable dummy pattern is provided. A second photomask including a second target pattern and a second printable dummy pattern are provided, wherein at least part of the second printable dummy pattern overlapping the first unprintable dummy pattern exposure limit, such that the second printable dummy pattern can not be printed in a wafer.
Abstract translation: 一种形成光掩模的方法包括以下步骤。 提供了包括第一目标图案和第一不可打印虚设图案的第一光掩模。 提供了包括第二目标图案和第二可打印虚设图案的第二光掩模，其中第二可打印虚拟图案的至少一部分与第一不可打印虚设图案曝光极限重叠，使得第二可打印虚拟图案不能被印刷在晶片 。
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