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    Method and device for data transmission
    1.
    发明申请
    Method and device for data transmission 有权
    用于数据传输的方法和装置

    公开(公告)号：US20060082477A1

    公开(公告)日：2006-04-20

    申请号：US10519600

    申请日：2003-06-20

    申请人： Uwe Guenther ,  Manfred Kirschner ,  Axel Aue

    发明人： Uwe Guenther ,  Manfred Kirschner ,  Axel Aue

    IPC分类号： H03M9/00

    CPC分类号： H04L25/45

    摘要： A method for serially transmitting data between a first and a second station is provided, the first station unidirectionally transmitting at least two signals to the second station on two signal paths. In this method, a shift register is provided in each station, the two signal paths of the first station being routed in parallel into a shift register, and the data transmission to the second station being carried out by automatically clocking the shift register from a time base.

    摘要翻译： 提供了一种用于在第一和第二站之间串行发送数据的方法，第一站在两条信号路径上单向发送至少两个信号到第二站。 在这种方法中，在每个站中提供移位寄存器，第一站的两个信号路径并行路由到移位寄存器中，并且通过从一个时间自动计时移位寄存器来执行到第二站的数据传输 基础。

    Method and device for data transmission
    2.
    发明授权
    Method and device for data transmission 有权
    用于数据传输的方法和装置

    公开(公告)号：US07336209B2

    公开(公告)日：2008-02-26

    申请号：US10519600

    申请日：2003-06-20

    申请人： Uwe Guenther ,  Manfred Kirschner ,  Axel Aue

    发明人： Uwe Guenther ,  Manfred Kirschner ,  Axel Aue

    IPC分类号： H03M9/00

    CPC分类号： H04L25/45

    摘要： A method for serially transmitting data between a first and a second station is provided, the first station unidirectionally transmitting at least two signals to the second station on two signal paths. In this method, a shift register is provided in each station, the two signal paths of the first station being routed in parallel into a shift register, and the data transmission to the second station being carried out by automatically clocking the shift register from a time base.

    摘要翻译： 提供了一种用于在第一和第二站之间串行发送数据的方法，第一站在两条信号路径上单向发送至少两个信号到第二站。 在这种方法中，在每个站中提供移位寄存器，第一站的两个信号路径并行路由到移位寄存器中，并且通过从一个时间自动计时移位寄存器来执行到第二站的数据传输 基础。

    Control chip for providing the basic functionality of a control unit
    3.
    发明授权
    Control chip for providing the basic functionality of a control unit 失效
    控制芯片，用于提供控制单元的基本功能

    公开(公告)号：US08583345B2

    公开(公告)日：2013-11-12

    申请号：US11990146

    申请日：2006-08-04

    申请人： Immanuel Krauter ,  Uwe Guenther ,  Manfred Kirschner ,  Beate Leibbrand

    发明人： Immanuel Krauter ,  Uwe Guenther ,  Manfred Kirschner ,  Beate Leibbrand

    IPC分类号： F02D41/30 ,  G06F19/00 ,  H02B1/26

    CPC分类号： G05B19/042 ,  G05B19/0428 ,  G05B2219/23282 ,  G05B2219/25258 ,  Y10T307/74

    摘要： A control chip for providing the basic functionality of a control unit includes a voltage supply having at least two, in particular three, output voltages; at least two, in particular three, sensor power supplies, in particular having 5-V and/or 3.3-V output voltage; at least one driver for bidirectional interfaces; a CAN driver; a follower control; a main relay output stage having a diagnostic function; at least one bidirectional serial interface for controlling the output stages and for communicating with a microcontroller; at least six power output stages, in particular having rated currents of 0.6 A to 3 A; at least one low-level signal output, in particular having a rated current of 50 mA, and four ignition drivers.

    摘要翻译： 用于提供控制单元的基本功能的控制芯片包括具有至少两个，特别是三个输出电压的电压源; 至少两个，特别是三个传感器电源，特别是具有5V和/或3.3V输出电压; 至少一个用于双向接口的驱动器; 一个CAN驱动程序 追随者控制; 具有诊断功能的主继电器输出级; 至少一个用于控制输出级并与微控制器进行通信的双向串行接口; 至少六个功率输出级，特别是具有0.6A至3A的额定电流; 至少一个低电平信号输出，特别是具有50mA的额定电流，以及四个点火驱动器。

    Control Chip for Providing the Basic Functionality of a Control Unit
    4.
    发明申请
    Control Chip for Providing the Basic Functionality of a Control Unit 失效
    控制芯片，用于提供控制单元的基本功能

    公开(公告)号：US20110022287A1

    公开(公告)日：2011-01-27

    申请号：US11990146

    申请日：2006-08-04

    申请人： Immanuel Krauter ,  Uwe Guenther ,  Manfred Kirschner ,  Beate Leibbrand

    发明人： Immanuel Krauter ,  Uwe Guenther ,  Manfred Kirschner ,  Beate Leibbrand

    IPC分类号： F02D41/30 ,  F02D45/00

    CPC分类号： G05B19/042 ,  G05B19/0428 ,  G05B2219/23282 ,  G05B2219/25258 ,  Y10T307/74

    摘要： A control chip for providing the basic functionality of a control unit includes a voltage supply having at least two, in particular three, output voltages; at least two, in particular three, sensor power supplies, in particular having 5-V and/or 3.3-V output voltage; at least one driver for bidirectional interfaces; a CAN driver; a follower control; a main relay output stage having a diagnostic function; at least one bidirectional serial interface for controlling the output stages and for communicating with a microcontroller; at least six power output stages, in particular having rated currents of 0.6 A to 3 A; at least one low-level signal output, in particular having a rated current of 50 rtiA, and four ignition drivers.

    摘要翻译： 用于提供控制单元的基本功能的控制芯片包括具有至少两个，特别是三个输出电压的电压源; 至少两个，特别是三个传感器电源，特别是具有5V和/或3.3V输出电压; 至少一个用于双向接口的驱动器; 一个CAN驱动程序 追随者控制; 具有诊断功能的主继电器输出级; 至少一个用于控制输出级并与微控制器进行通信的双向串行接口; 至少六个功率输出级，特别是具有0.6A至3A的额定电流; 至少一个低电平信号输出，特别是具有50rtiA的额定电流，以及四个点火驱动器。

    Damping circuit for a two-wire bus system
    5.
    发明授权
    Damping circuit for a two-wire bus system 有权
    二线总线系统阻尼电路

    公开(公告)号：US06639774B1

    公开(公告)日：2003-10-28

    申请号：US09601784

    申请日：2000-11-20

    申请人： Hans-Peter Stroebele ,  Wolfgang Meissner ,  Uwe Guenther ,  Bernd Hilgenberg ,  Juergen Reinhardt

    发明人： Hans-Peter Stroebele ,  Wolfgang Meissner ,  Uwe Guenther ,  Bernd Hilgenberg ,  Juergen Reinhardt

    IPC分类号： H02H318

    CPC分类号： H04L12/40013 ,  B60R16/0315 ,  H04L12/4135 ,  H04L2012/40215 ,  H04L2012/40273

    摘要： A two-wire bus system for connecting a plurality of users has at least one damping circuit for damping line resonances in the two-wire bus system with respect to a reference potential. The damping characteristic of the damping circuit is selected such that the damping only becomes operative above a preestablished reference voltage threshold1 value. In this manner, it is achieved that a useful signal is not weakened by the damping circuit, but rather resonance voltages are damped only above the threshold value. It is advantageous if each of the users of the bus system has assigned to it a damping circuit.

    摘要翻译： 用于连接多个用户的双线总线系统具有至少一个阻尼电路，用于相对于参考电位阻尼两线总线系统中的线谐振。 选择阻尼电路的阻尼特性使得阻尼仅在预先建立的参考电压阈值1值之上工作。 以这种方式，实现了有用信号不被阻尼电路削弱，而是谐振电压仅被抑制在阈值以上。 总线系统的每个用户已经分配了阻尼电路是有利的。

    Integrated semiconductor device having a thyristor
    6.
    发明授权
    Integrated semiconductor device having a thyristor 失效
    具有晶闸管的集成半导体器件

    公开(公告)号：US5581096A

    公开(公告)日：1996-12-03

    申请号：US343409

    申请日：1994-11-22

    申请人： Adolf Kugelmann ,  Vinko Marolt ,  Uwe Guenther ,  Oliver Schatz

    发明人： Adolf Kugelmann ,  Vinko Marolt ,  Uwe Guenther ,  Oliver Schatz

    IPC分类号： H01L29/74 ,  H01L31/111

    CPC分类号： H01L29/7436

    摘要： An integrated semiconductor device having a thyristor includes outer npn-transistors, outer pnp-transistors, and an inner npn-transistor. The outer pnp-transistors and the inner npn-transistor are interconnected so as to form a thyristor to allow the inner transistor to be biased into conduction. Furthermore, a current flow takes place via the outer npn-transistors and the inner npn-transistor. The integrated semiconductor device having a thyristor minimizes interference produced in neighboring components.

    摘要翻译： 具有晶闸管的集成半导体器件包括外部npn晶体管，外部pnp晶体管和内部npn晶体管。 外部pnp晶体管和内部npn晶体管互连以形成晶闸管，以允许内部晶体管被偏置成导通。 此外，电流通过外部npn晶体管和内部npn晶体管发生。 具有晶闸管的集成半导体器件使在相邻部件中产生的干扰最小化。

    Method and device for transmitting a selection signal from a processor to a peripheral by violating a symmetry of transmission of a data signal
    8.
    发明授权
    Method and device for transmitting a selection signal from a processor to a peripheral by violating a symmetry of transmission of a data signal 有权
    通过违反数据信号的传输的对称性将选择信号从处理器发送到外围设备的方法和装置

    公开(公告)号：US07228449B2

    公开(公告)日：2007-06-05

    申请号：US10643616

    申请日：2003-08-18

    申请人： Uwe Guenther

    发明人： Uwe Guenther

    IPC分类号： G06F1/04

    CPC分类号： G06F13/4291

    摘要： The present invention provides a method and a device for serial transmission of data between a processor module and at least one peripheral element with the aid of a timing signal, a data signal and a selection signal. To reduce the number of lines necessary for the serial data transmission between the processor module and the at least one peripheral element at high data rate, the timing signal may be transmitted via two timing lines between the processor module and the at least one peripheral element, the data signal may be transmitted via two data lines between the processor module and the at least one peripheral element, and the selection signal may be transmitted via the data lines.

    摘要翻译： 本发明提供了一种用于借助于定时信号，数据信号和选择信号在处理器模块和至少一个外围元件之间串行传输数据的方法和装置。 为了减少在高数据速率下在处理器模块和至少一个外围元件之间的串行数据传输所需的行数，可以通过处理器模块和至少一个外围元件之间的两条定时线传输定时信号， 数据信号可以经由处理器模块和至少一个外围元件之间的两条数据线传输，并且可以经由数据线传输选择信号。